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* r600g: Don't create a texture for the memory_pool during screen initTom Stellard2012-07-092-8/+24
| | | | | | | This fixes a segfault in r600_screen_create() introduced by eb065f5d9d1159af3a88a64a7606c9b6d67dc3 Reported by tilman on irc.
* radeon/llvm: Rename namespace from AMDIL to AMDGPUTom Stellard2012-07-0925-360/+361
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* r600g: Update number of gprs when adding a vertex instructionTom Stellard2012-07-091-0/+4
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* r600g/compute: Use evergreen_cb() for binding RATsTom Stellard2012-07-095-70/+48
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* r600g: Add support for RATs in evergreen_cb()Tom Stellard2012-07-091-3/+11
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* r600g: Use a texture as the underlying resource for compute_memory_poolTom Stellard2012-07-092-18/+37
| | | | This the first step towards being able to use evergreen_cb to bind RATs.
* r600g: Add is_rat flag to r600_resource_textureTom Stellard2012-07-091-0/+1
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* r600g: Add r600_context_pipe_state_emit()Tom Stellard2012-07-092-6/+71
| | | | | | | | This function is used when dispatching compute shader in order to avoid mixing compute and 3D registers in the context's dirty list. This allows the compute code to resuse 3D functions like evergreen_cb, which return a struct r600_pipe_state and still have control over when and how the register writes are emitted.
* r600g: Add pkt_flag parameter to r600_context_block_emit_dirty()Tom Stellard2012-07-093-3/+15
| | | | | | | This allows the shader type bit to be set in the pm4 header when emitting registers for compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* r600g/compute: Move LOOP_CONST initialization to start_compute_cs atomTom Stellard2012-07-091-14/+16
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* r600g: Add start_compute_cs atom to struct r600_contextTom Stellard2012-07-094-94/+96
| | | | | | | | | The start_compute_cs atom initializes some config and context registers to the values needed for running compute shaders. When a compute shader is dispatched, this atom is emitted after the start_cs_cmd atom, which initializes registers that are common to both 3D and compute. Reviewed-by: Marek Olšák <[email protected]>
* r600g: Add pkt_flag member to struct r600_command_bufferTom Stellard2012-07-091-3/+16
| | | | | | | | | | Some packets require the shader type bit (bit 1) to be set when used for compute shaders. The pkt_flag will be initialized to RADEON_CP_PACKET3_COMPUTE_MODE for any struct r600_command_buffer used for dispatching compute shaders and it will be or'd against the result of the PKT3 macro when adding a new packet to a struct r600_command buffer. Reviewed-by: Marek Olšák <[email protected]>
* r600g: Only emit start_cs_cmd atom once for compute command streamsTom Stellard2012-07-091-2/+0
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* r600g: fix stencil texturing with Z32_FLOAT_S8X24_UINTMarek Olšák2012-07-091-0/+2
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* r600g: add assertions after translate_colorswap/colorformat/dbformat/texformatMarek Olšák2012-07-092-3/+17
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* r600g: inline r600_hw_copy_regionMarek Olšák2012-07-091-21/+5
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* r600g: enable dual src blending on r7xxMarek Olšák2012-07-091-1/+1
| | | | No lockups here.
* r600g: use depth format from pipe_surface, not pipe_resourceMarek Olšák2012-07-092-4/+4
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* r600g: use u_box_origin_2d helper functionMarek Olšák2012-07-091-10/+3
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* gallium/u_blitter: consolidate some state changesMarek Olšák2012-07-091-32/+17
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* r600g: remove stray semicolonMarek Olšák2012-07-071-1/+1
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* galahad: Check that texture format is supported.José Fonseca2012-07-061-0/+7
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* galahad: More detailed resource checks.José Fonseca2012-07-062-19/+64
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* galahad: Fix zealous warnings.José Fonseca2012-07-061-6/+10
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* galahad: Enumerate all methods that are missing.José Fonseca2012-07-062-24/+49
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* galahad: Implement render_condition.José Fonseca2012-07-061-1/+13
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* galahad: Don't implement context methods that are not implemented by the ↵José Fonseca2012-07-061-104/+115
| | | | underlying pipe driver.
* galahad: Use debug_printf.José Fonseca2012-07-061-3/+5
| | | | stderr is not visible on windows.
* galahad: Silence creation messages.José Fonseca2012-07-062-4/+0
| | | | Let galahad warnings be true warnings.
* galahad: Use reference counting when destroying the wraped objects.José Fonseca2012-07-061-3/+2
| | | | As the wrapped pipe driver may hold internal references.
* galahad: Point to the galahad objects from the galahad sampler view.José Fonseca2012-07-061-2/+2
| | | | And not the wraped driver's objects.
* galahad: Don't defer index buffer when it's NULL.José Fonseca2012-07-061-16/+16
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* target-helpers: Enable debug helpers only on debug builds.José Fonseca2012-07-061-0/+7
| | | | Some of these helpers use debug_get_option, which works also on releases.
* svga: whitespace fixesBrian Paul2012-07-051-114/+90
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* svga: implement TGSI_OPCODE_ROUNDBrian Paul2012-07-051-15/+51
| | | | | | | ROUND and TRUNC are implemented with one function to reduce code duplication. Note: ROUND isn't actually used yet, but probably will be soon. Reviewed-by: José Fonseca <[email protected]>
* svga: fix CMP translation for vertex shadersBrian Paul2012-07-051-36/+37
| | | | | | | | | | Converting CMP to SLT+LRP didn't work when src2 or src3 was Inf/NaN. That's the case for GLSL sqrt(0). sqrt(0) actually happens in many piglit auto-generated tests that use the distance() function. v2: remove debug/devel code, per Jose Reviewed-by: José Fonseca <[email protected]>
* svga: properly implement TRUNC instructionBrian Paul2012-07-051-1/+54
| | | | | | | | | | Was previously implemented with FLOOR. Fixes quite a few piglit tests of float->int conversion, integer division, etc. v2: clean up left over debug/devel code, per Jose Reviewed-by: José Fonseca <[email protected]>
* svga: fix register collision issue in emit_conditional()Brian Paul2012-07-051-0/+24
| | | | | | | If the 'dst' register is the same as the 'pass' register we'll generate invalid code. Use a temporary register in that case. Reviewed-by: José Fonseca <[email protected]>
* svga: emit some debug messages when shader compilation failsBrian Paul2012-07-051-4/+10
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* gallium/util: Save and restore vertex buffer state in util_gen_mipmap.Stuart Abercrombie2012-07-041-0/+2
| | | | | | | | | | | | | Calling glGenerateMipmap could overwrite vertex buffer state, leading to incorrect rendering or crashes depending on the Gallium driver. This was happening on WebGL Conformance test texture-size. Before 784dd51198433e5c299da4a7742c68d21d68d1c1 this was covered up by redundant vertex buffer validation. Reviewed-by: Stéphane Marchesin <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/tgsi: Don't declare temps individually when they are all similar.José Fonseca2012-07-021-8/+19
| | | | | | | | | | | | tgsi_ureg was recently enhanced to support local temporaries, and as result temps are declared individually. This change avoids many TEMP register declarations on common shaders. (And fixes performance regression due to mismatches against performance sensitive shaders.) Reviewed-by: Brian Paul <[email protected]>
* gallivm: Cleanup the 4 x float -> 16 ub special path in lp_build_conv.José Fonseca2012-07-021-49/+26
| | | | | | No behaviour change intended. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium/util: Add ULL suffix to large constants.José Fonseca2012-07-021-3/+3
| | | | | As suggested by Andy Furniss: it looks like some old gcc versions require it.
* clover: Handle NULL devs argument in clBuildProgramTom Stellard2012-07-011-5/+10
| | | | | If devs is NULL, then the kernel should be compiled for all devices associated with the program.
* clover: Define non-templated copy constructor for clover::ref_ptr.Francisco Jerez2012-07-011-2/+1
| | | | | | | | | The templated copy constructor doesn't prevent the compiler from emitting a default copy constructor, which leads to inconsistent memory handling and was reported to cause segfaults when doing event manipulation. Reported-by: Tom Stellard <[email protected]>
* llvmpipe: fix comment typoBrian Paul2012-06-291-1/+1
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* clover: Add a function internalizer pass before LTO v2Tom Stellard2012-06-291-10/+49
| | | | | | | | | The function internalizer pass marks non-kernel functions as internal, which enables optimizations like function inlining and global dead-code elimination. v2: - Pass vector arguments by const reference
* radeon/llvm: Enable vec4 loads on R600Tom Stellard2012-06-293-0/+20
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* radeon/llvm: Enable floating point stores on R600Tom Stellard2012-06-291-0/+6
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* radeon/llvm: Handle floating point loads on R600Tom Stellard2012-06-292-0/+31
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