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* amd: move r600d_common.h into r600gMarek Olšák2017-10-094-2/+139
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: shrink r600d_common.h and stop using itMarek Olšák2017-10-0914-76/+215
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: import cayman_msaa.c from drivers/radeonMarek Olšák2017-10-0910-307/+292
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove r600_emit_relocMarek Olšák2017-10-094-28/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: merge si_set_streamout_targets with si_common_set_streamout_targetsMarek Olšák2017-10-093-126/+109
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add si_so_target_referenceMarek Olšák2017-10-091-2/+8
| | | | | | The src type is different on purpose. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: import r600_streamout from drivers/radeonMarek Olšák2017-10-0915-177/+181
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add performance thresholds for CP DMA, decrease it for clearsMarek Olšák2017-10-091-1/+7
| | | | | | The first one isn't used yet. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: disable primitive binning on Vega10 (v2)Marek Olšák2017-10-093-4/+19
| | | | | | | | | | | | | | | Our driver implementation is known to decrease performance for some tests, but we don't know if any apps and benchmarks (e.g. those tested by Phoronix) are affected. This disables the feature just to be safe. Set this to enable partial primitive binning: R600_DEBUG=dpbb Set this to enable full primitive binning: R600_DEBUG=dpbb,dfsm v2: add new debug options Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enumerize DBG flagsMarek Olšák2017-10-0912-144/+155
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't change viewport for blits, use window-space positionsMarek Olšák2017-10-077-19/+6
| | | | | | The viewport state was an identity anyway. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set correct PA_SC_VPORT_ZMIN/ZMAX when viewport is disabledMarek Olšák2017-10-071-2/+19
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: minor cleanup of si_update_vs_writes_viewport_indexMarek Olšák2017-10-073-5/+9
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't save and restore vertex buffers and elements for u_blitterMarek Olšák2017-10-072-8/+9
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use new VS blit shaders (VS inputs in SGPRs)Marek Olšák2017-10-075-57/+51
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add VS blit shader creationMarek Olšák2017-10-077-2/+217
| | | | | | no users yet Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: split declare_default_desc_pointersMarek Olšák2017-10-071-9/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_blitter: let drivers decide which VS to use for draw_rectangleMarek Olšák2017-10-078-42/+72
| | | | | | | This approach allows drivers to set their own vertex shader and skip compilation of u_blitter vertex shaders. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_blitter: let drivers set the vertex elements stateMarek Olšák2017-10-078-28/+45
| | | | | | radeonsi won't set it. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_blitter: remove blitter_context_priv::viewportMarek Olšák2017-10-071-10/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use util_draw_arrays_instanced in si_draw_rectangleMarek Olšák2017-10-071-3/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move si_draw_rectangle into si_state_draw.cMarek Olšák2017-10-074-88/+85
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove wrappers si_decompress_xx_texturesMarek Olšák2017-10-074-15/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_atom::num_dwMarek Olšák2017-10-074-39/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove old r600g code checking chip_class and familyMarek Olšák2017-10-077-226/+53
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/va: Implement vaExportSurfaceHandle()Mark Thompson2017-10-073-1/+153
| | | | | | | | | | | | | | | This is a new interface in libva2 to support wider use-cases of passing surfaces to external APIs. In particular, this allows export of NV12 and P010 surfaces. v2: Convert surfaces to progressive before exporting them (Christian). v3: Set destination rectangle to match source when converting (Leo). Add guards to allow building with libva1. Signed-off-by: Mark Thompson <[email protected]> Acked-by: Christian König <[email protected]> Acked-and-Tested-by: Leo Liu <[email protected]>
* gallivm: don't use pabs intrinsic with llvm version >= 6Roland Scheidegger2017-10-071-9/+4
| | | | | | | | | | | | The intrinsic is gone, causing shader compilation to crash. While here, also change the fallback code to match what llvm's auto-updater of these intrinsics would do (except that there will still be zext/trunc instructions in there), which should ensure that the sequence gets recognized and fused back into a pabs in the end (I didn't test this, and it's possible even the old sequence would get recognized, but I don't see a reason why we shouldn't use the same sequence in any case). Tested-by: Vinson Lee <[email protected]>
* swr/rast: use proper alignment for debug transposedPrimsTim Rowley2017-10-061-2/+2
| | | | | | | | Causing a crash in ParaView waveletcontour.py test when _DEBUG defined due to vector aligned copy with unaligned address. Reviewed-by: Bruce Cherniak <[email protected]>
* radeonsi: add a drirc workaround for HTILE corruption in ARK: Survival EvolvedMarek Olšák2017-10-064-0/+22
| | | | | | | | v2: use DB_META | PS_PARTIAL_FLUSH Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955 Reviewed-by: Samuel Pitoiset <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
* radeonsi: inline struct si_sampler_viewsMarek Olšák2017-10-065-42/+37
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename si_textures_info -> si_samplers, si_images_info -> si_imagesMarek Olšák2017-10-063-20/+20
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fold needs_*_decompress_mask update into si_set_sampler_viewMarek Olšák2017-10-061-54/+46
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: simplify a loop in si_update_fb_dirtiness_after_renderingMarek Olšák2017-10-061-15/+11
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use f32_0 and f32_1Marek Olšák2017-10-064-26/+26
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fold *gallivmMarek Olšák2017-10-062-52/+31
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: lp_type::length is always 1Marek Olšák2017-10-061-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use bld.elem_typeMarek Olšák2017-10-061-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use lp_build_const_*Marek Olšák2017-10-062-9/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ctx->ac.context and ctx->typesMarek Olšák2017-10-064-46/+34
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ctx->ac.builderMarek Olšák2017-10-064-422/+342
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ctx->i/f32 types moreMarek Olšák2017-10-061-6/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use i32_0 and i32_1 moreMarek Olšák2017-10-062-11/+13
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use bitcast in a few placesMarek Olšák2017-10-061-5/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ac helpers for bitcastsMarek Olšák2017-10-064-128/+87
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
* radeonsi: implement PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-062-5/+20
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use si_get_indirect_index for TEMP indexingMarek Olšák2017-10-061-18/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use si_get_indirect_index for CONST indexingMarek Olšák2017-10-063-14/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/ureg: allow any register file in address operandsMarek Olšák2017-10-061-6/+0
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-0617-0/+18
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: scan address operands (v2)Marek Olšák2017-10-061-1/+42
| | | | | | v2: set swizzled usage mask Reviewed-by: Nicolai Hähnle <[email protected]>
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