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* amd/addrlib: move addrlib from amdgpu winsys to common codeDave Airlie2016-09-0623-21944/+3
| | | | | Acked-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/util: move endian detect into a separate fileDave Airlie2016-09-061-38/+2
| | | | | | | | This just ports the simpler endian detection bits, addrlib sharing wants this outside gallium. Acked-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon: move radeon_family/chip_class defintions to commonDave Airlie2016-09-061-84/+2
| | | | | | | This just moves these to a common header file. Acked-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move sid.h/r600d_common.h to a common place.Dave Airlie2016-09-069-9318/+10
| | | | | | | | | | Step one to merging radv would be to move some files around. This only adds the include path to r600/radeonsi, because later we want to avoid having to add it to the generic target paths. Acked-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove VPORT_ZMIN/ZMAX from init config statesMarek Olšák2016-09-053-25/+1
| | | | | | | It's part of the viewport state now. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: set VPORT_ZMIN/MAX registers correctlyMarek Olšák2016-09-0512-13/+82
| | | | | | | | | | | | Calculate depth ranges from viewport states and pipe_rasterizer_state::clip_halfz. The evergreend.h change is required to silence a warning. This fixes this recently updated piglit: arb_depth_clamp/depth-clamp-range Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: unify viewport emission codeMarek Olšák2016-09-051-14/+16
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: also do VS_PARTIAL_FLUSH before updating VGT ring pointersMarek Olšák2016-09-051-0/+6
| | | | | | | ported from Vulkan Acked-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix variable naming in si_emit_cache_flushMarek Olšák2016-09-051-31/+31
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't emit CS_PARTIAL_FLUSH if compute is not usedMarek Olšák2016-09-053-1/+5
| | | | | | | for less noise in the HUD Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add HUD queries for counting VS/PS/CS partial flushesMarek Olšák2016-09-054-0/+35
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename the num-cs-flushes query to num-ctx-flushesMarek Olšák2016-09-052-5/+5
| | | | | | | num-cs-flushes will mean compute shader flushes Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix a badly implemented GS bug workaroundMarek Olšák2016-09-051-8/+13
| | | | | | | Limit it to geometry shaders and Hawaii. Acked-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix texture format reinterpretation with DCCMarek Olšák2016-09-055-1/+116
| | | | | | | | | | | | DCC is limited in how texture formats can be reinterpreted using texture views. If we get a view format that is incompatible with the initial texture format with respect to DCC, disable DCC. There is a new piglit which tests all format combinations. What works and what doesn't was deduced by looking at the piglit failures. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix Gather4 with integer formatsMarek Olšák2016-09-051-3/+96
| | | | | | | | | | The closed compiler does the same thing. This fixes: GL45-CTS.texture_gather.*-int-* (18 tests) Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix a crash in imageSize for cubemap arraysMarek Olšák2016-09-051-3/+1
| | | | | | | | | | | Sometimes it was f32, other times it was i32. Now it's always i32. This fixes: GL45-CTS.texture_cube_map_array.image_texture_size.texture_size_compute_sh Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix gl_PatchVerticesIn for tessellation evaluation shaderMarek Olšák2016-09-051-1/+6
| | | | | | | | | This fixes: GL45-CTS.tessellation_shader.tessellation_control_to_tessellation_evaluation .gl_PatchVerticesIn Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix cubemaps viewed as 2DMarek Olšák2016-09-051-0/+4
| | | | | | | | | | | This fixes: GL43-CTS.texture_view.view_sampling v2: fix a typo, merge both if statements Cc: [email protected] Reviewed-by: Dave Airlie <[email protected]> (v1) Reviewed-by: Bas Nieuwenhuizen <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: always use the same function signature for llvm.SI.exportMarek Olšák2016-09-051-4/+4
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: return correct eviction stats for NVX_gpu_memory_infoMarek Olšák2016-09-051-2/+7
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: also eliminate DCC fast clear in resource_get_handleMarek Olšák2016-09-051-2/+3
| | | | | | | just do what the comment says Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use the current ctx for CMASK elimination in resource_get_handleMarek Olšák2016-09-051-6/+11
| | | | | | | For coherency with the current context. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use the current ctx for DCC decompression in resource_get_handleMarek Olšák2016-09-051-3/+3
| | | | | | | For coherency with the current context. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: derive buffer placement and flags only at initializationMarek Olšák2016-09-055-49/+67
| | | | | | | | | | Invalidated buffers don't have to go through it. Split r600_init_resource into r600_init_resource_fields and r600_alloc_resource. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set more sampler settingsMarek Olšák2016-09-052-2/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* noop: implement resource_get_handleMarek Olšák2016-09-051-2/+14
| | | | X+DRI3 locks up if the returned handle is invalid.
* noop: set missing functionsMarek Olšák2016-09-052-0/+75
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* noop: simplify some functionsMarek Olšák2016-09-051-49/+7
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* gk110/ir: fix quadop dall emissionIlia Mirkin2016-09-041-2/+2
| | | | | | | | | We recently starting to always emit the NDV (== dall) bit for quadops. However it was folded into the wrong code word. Fixes: e0a067ed48 (nv50/ir: always emit the NDV bit for OP_QUADOP) Signed-off-by: Ilia Mirkin <[email protected]> Cc: <[email protected]>
* a3xx: use window scissor to simulate viewport xy clipIlia Mirkin2016-09-031-10/+26
| | | | | | | | | | | | | Unfortunately a3xx does not have a separate disable for depth clipping, so when depth clamp is enabled, we disable the whole 3d clipper logic. This in turn also gets rid of the xy clip that it would normally do. When we detect this would happen, instead we integrate the viewport into the window scissor. This may have slightly different behavior around wide points, but it's unlikely that anything depends on this. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97231 Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* a3xx: make use of software clipping when hw can't handle itIlia Mirkin2016-09-036-4/+36
| | | | | | | | | The hw clipper only handles up to 6 UCPs. If there are more than 6 UCPs, or a clip vertex, or clip distances are in use, then we must use the fallback discard-based clipping from the frag shader. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* a3xx: make sure to actually clamp depth as requestedIlia Mirkin2016-09-032-2/+30
| | | | | | | | | | | We were previously ... not clamping. I guess this meant that everything got clamped to 1/0, which was enough to pass the existing tests. Or perhaps the clamping would only happen to the rasterized depth value and not the frag shader's output depth value. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97231 Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0/ir: allow min/max instructions to be dual-issued in pairsKarol Herbst2016-09-031-2/+12
| | | | | | | | | | | | | | changes for GpuTest /test=pixmark_piano /benchmark /no_scorebox /msaa=0 /benchmark_duration_ms=60000 /width=1024 /height=640: inst_executed: 1.03G inst_issued1: 614M -> 580M inst_issued2: 213M -> 230M score: 1021 -> 1030 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: respect render condition enable flag when clearing rt/zsIlia Mirkin2016-09-032-12/+24
| | | | | | | | This is a newly added flag. We always pass false into it from nv50_clear_texture, but other callers may want to respect the render condition. (And the functions were originally spec'd to respect it.) Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: don't dual-issue ops that depend or interfere with each otherKarol Herbst2016-09-033-14/+23
| | | | | | | Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]> [imirkin: rewrite to split up the helpers and move more logic to target] Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: reduce the initial code segment size to 512KBSamuel Pitoiset2016-09-011-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: allow to resize the code segment dynamicallySamuel Pitoiset2016-09-011-1/+24
| | | | | | | | | | | | | When an application uses a ton of shaders, we need to evict them when the code segment is full but this is not really a good solution if monster shaders are used because code eviction will happen a lot. To avoid this, it seems better to dynamically resize the code segment area after each eviction. The maximum size is arbitrary fixed to 8MB which should be enough. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: add a new bin for the code segmentSamuel Pitoiset2016-09-012-4/+6
| | | | | | | | | To avoid the bins list to grow up indefinitely when the code segment size will be bumped, we need to separate that bin from the SCREEN one because it contains other resources like the uniform bo. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: add nvc0_screen_resize_text_area() helperSamuel Pitoiset2016-09-013-10/+40
| | | | | | | | This function will be helpful for resizing the code segment area when we need to evict all shaders. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: re-upload currently bound shaders after code evictionSamuel Pitoiset2016-09-011-0/+27
| | | | | | | | | | | | | This fixes a very old issue which happens when the code segment size is full. A bunch of real applications like Tomb Raider, F1 2015, Elemental, hit that issue because they use a ton of shaders. In this case, all shaders are evicted (for freeing space) but all currently bound shaders also need to be re-uploaded and SP_START_ID have to be updated accordingly. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: refactor the program upload processSamuel Pitoiset2016-09-013-32/+59
| | | | | | | | | | This refactoring will help for fixing the "out of code space" eviction issue because we will need to reupload the code for all currently bound shaders but it's slightly different than uploading a new fresh code. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium/postprocess: Fix resource freeingThomas Hellstrom2016-09-011-4/+2
| | | | | | | | | The code was triggering asserts in DEBUG builds of the SVGA driver since the reference count of the resource was never decremented before destroy. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* Introduce .editorconfigEric Engestrom2016-08-3116-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | A few weeks ago, Jose Fonseca suggested [0] we use .editorconfig files to try and enforce the formatting of the code, to which Michel Dänzer suggested [1] we start by importing the existing .dir-locals.el settings. The first draft was discussed in the RFC [2]. These .editorconfig are a first step, one that has the advantage of requiring little to no intervention from the devs once the settings files are in place, but the settings are very limited. This does have the advantage of applying while the code is being written. This doesn't replace the need for more comprehensive formatting tools such as clang-format & clang-tidy, but those reformat the code after the fact. [0] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121545.html [1] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121639.html [2] https://lists.freedesktop.org/archives/mesa-dev/2016-July/123431.html Acked-by: Nicolai Hähnle <[email protected]> Acked-by: Eric Anholt <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* vc4: Add missing break statement.Eric Anholt2016-08-311-0/+1
| | | | | This opcode isn't used yet, so it didn't affect anything. Caught by Coverity, reported to me by imirkin.
* gallium/docs: clarify render_condition_enabled parameter to clear functionsBrian Paul2016-08-311-0/+4
| | | | | | If false, it means do the clear unconditionally. Reviewed-by: Marek Olšák <[email protected]>
* nvc0: remove an attempt at uploading all IMMD into a CBSamuel Pitoiset2016-08-313-40/+0
| | | | | | | | | | | This has never been used because info->immd.bufSize is always 0 and anyways this is an experimental code which has never been completed. This gets rid of some unused code in the program validation process. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: remove unused nv50_program::immd_size fieldSamuel Pitoiset2016-08-311-1/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv30: set usage to staging so that the buffer is allocated in GARTIlia Mirkin2016-08-311-1/+2
| | | | | | | | | | The code a few lines below expects to migrate the bo in question to VRAM. Since we're filling the initial data via CPU, it's more efficient to create the temporary buffer in GART. There is no "push" method implemented, otherwise we'd use that instead. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nv30: only bail on color/depth bpp mismatch when surfaces are swizzledIlia Mirkin2016-08-311-2/+3
| | | | | | | | | | | The actual restriction is a little weaker than I originally thought. See https://bugs.freedesktop.org/show_bug.cgi?id=92306#c17 for the suggestion. This also explain why things weren't *always* failing before, only sometimes. We will allocate a non-swizzled depth buffer for NPOT winsys buffer sizes, which they almost always are. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* st/nine: fix unreachable() typoEric Engestrom2016-08-301-1/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
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