| Commit message (Collapse) | Author | Age | Files | Lines |
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Extend ilo_builder_writer_reloc() for Gen8 memory addressing. Add new
wrappers, ilo_builder_surface_reloc64(() and ilo_builder_batch_reloc64().
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Based on what we know from the classic driver.
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Accumulated changes for various renames and additions, including Gen8
definitions. Some of the dynamic state __SIZE no longer means the size of an
element, but the size of an array of elements. The changes can be seen in
ilo_render_dynamic.c.
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Add dsa_get_stencil_enable_gen6(), dsa_get_depth_enable_gen6(), and
dsa_get_alpha_enable_gen6() to be called from ilo_gpe_init_dsa().
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Make ilo_blend_state more space efficient and forward-looking.
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Use signed int for sample positions and add helpers to access them. Call them
patterns instead of positions.
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Without this when an application issues that query, it would try to
wait the result from the gpu, and since no query has been actually
issued, it will wait forever.
Signed-off-by: Tiziano Bacocco <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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Add a specific optimisation pass for NV50 to check whether SRC0 or SRC1 is
a MOV dst, IMM. If so: fold the IMM in and try to drop the MOV. Must be
done post-RA because it requires that SDST == SSRC2.
V2: improve readability and add comments to clarify decisions
V3: Remove redundant code... compiler already attempts to put the IMM in
SSRC1
Signed-off-by: Roy Spliet <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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But don't enable generation of it in the opProperties, because we can't
guarantee the SDST==SRC2 constraint until after register assignment. We'll
add a post-RA folding pass to utilise this.
Signed-off-by: Roy Spliet <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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Add emission rules for negative and saturate flags for MAD 4-byte opcodes,
and get rid of some of the constraints. Obviously tested with a wide variety
of shaders.
V2: Document MAD as supported short form
V3: Split up IMM from short-form modifiers
Signed-off-by: Roy Spliet <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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The old way made it impossible for the optimizer to reason about what
was going on. The new way is the same number of instructions (the neg
gets folded into the cvt) but enables the optimizer to be cleverer if
comparing to a constant (most common case). [The optimizer is presently
not sufficiently clever to work this out, but it could relatively easily
be made to be. The old way would have required significant complexity to
work out.]
Signed-off-by: Ilia Mirkin <[email protected]>
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Convert the code to try formats from an array rather than a bunch
of if/else cases.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Since only pp_jimenezmlaa uses depth buffer, we can make it optional.
Signed-off-by: Marek Olšák <[email protected]>
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88962
Signed-off-by: Marek Olšák <[email protected]>
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I wanted all of these for NIR-to-TGSI.
Reviewed-by: Roland Scheidegger <[email protected]>
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I wanted to use it for nir-to-tgsi. The equivalent ureg_src_register() is
also located here.
Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Glenn Kennard <[email protected]>
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This expects (0,0,0,0), though it can be changed to something else or allow
more than one set of values to be considered correct.
This is currently the radeonsi behavior.
Reviewed-by: Glenn Kennard <[email protected]>
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v2: allow one of the two values
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Reviewed-by: Glenn Kennard <[email protected]>
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Reviewed-by: Glenn Kennard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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ADD R6.y.1, R5.w.1, ~1|3f800000
ADD R6.y.2, |R6.y.1|, -0.0001|b8d1b717
was wrongly being converted to
ADD R6.y.1, R5.w.1, ~1|3f800000
ADD R6.y.2, R5.w.1, -1.0001|bf800347
because abs() modifier was ignored.
Signed-off-by: Xavier Bouchoux <[email protected]>
Reviewed-by: Glenn Kennard <[email protected]>
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Since alu does not support abs() modifier on source operands, spill
and apply the modifiers to a temp register when needed.
Signed-off-by: Xavier Bouchoux <[email protected]>
Reviewed-by: Glenn Kennard <[email protected]>
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v2: incorporated changes from Marek Olšák
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: David Heidelberg <[email protected]>
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Use a dummy vertex buffer object when vs inputs have no corresponding
entries in the vertex declaration. This dummy buffer will give to the
shader float4(0,0,0,0).
This fixes several artifacts on some games.
Signed-off-by: Axel Davy <[email protected]>
Signed-off-by: Tiziano Bacocco <[email protected]>
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The drm fd wasn't released, causing a crash
for wine tests on nouveau, which seems to have
a bug when a lot of device descriptors are open.
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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We weren't releasing hal and ref, causing some issues (threads not released, etc)
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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When on a render node the unique ioctl doesn't work.
This patch drops the code to detect the device, which relied
on an ioctl, and replaces it by the mesa loader function.
The mesa loader function is more complete and won't fail for render-nodes.
Alternatively we could also have used the pipe cap to
determine the vendor and device id from the driver.
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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render to
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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framebuffer bound
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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