aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Collapse)AuthorAgeFilesLines
...
* radeon/video: always use the reusable buffer poolNicolai Hähnle2016-04-274-5/+5
| | | | | | | | | | | A semantic error was introduced in a past refactoring that caused the bind parameter to be passed into the use_reusable_pool parameter of buffer_create. Since this clearly makes no sense, and there is no clear reason why the cache _shouldn't_ be used, just use the cache always. Cc: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: work around an MSAA fast stencil clear problemNicolai Hähnle2016-04-271-3/+15
| | | | | | | | A piglit test (arb_texture_multisample-stencil-clear) has been sent. This problem was discovered analyzing Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93767 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: expclear must be disabled on first Z/S clearNicolai Hähnle2016-04-271-2/+2
| | | | | | The documentation and the HW team say so. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move blend choice out of loop in si_blit_decompress_colorNicolai Hähnle2016-04-271-9/+9
| | | | | | It does not depend on the level or layer. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use level mask for early out in si_blit_decompress_colorNicolai Hähnle2016-04-271-6/+8
| | | | | | | | Mostly for consistency with the other decompress functions, but note that in the non-DCC decompress case, the function can now early-out in slightly more (albeit probably rare) cases. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: si_blit_decompress_depth is only used for stagingNicolai Hähnle2016-04-271-21/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: only decompress the required ZS planes from si_blitNicolai Hähnle2016-04-271-6/+7
| | | | | | | | | This happens to "fix" a rendering bug in KotOR2, because it avoids a still not quite understood bug with MSAA fast stencil clear decompress. For the stencil clear bug, I have sent a piglit test (arb_texture_multisample-stencil-clear). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93767 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: decompress Z & S planes in one passNicolai Hähnle2016-04-271-28/+73
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: early out of si_blit_decompress_depth_in_place based on dirty maskNicolai Hähnle2016-04-271-6/+14
| | | | | | Avoid dirtying the db_render_state atom when possible. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use MIN2 instead of expanded ?: operatorNicolai Hähnle2016-04-271-3/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix brace styleNicolai Hähnle2016-04-271-2/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: add u_bit_consecutive for generating a consecutive range of bitsNicolai Hähnle2016-04-271-0/+12
| | | | | | | There are some undefined behavior subtleties, so having a function to match the u_bit_scan_consecutive_range makes sense. Reviewed-by: Marek Olšák <[email protected]>
* swr: s/Elements/ARRAY_SIZE/Tim Rowley2016-04-273-7/+7
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* radeonsi: emit s_waitcnt for shader memory barriers and volatileNicolai Hähnle2016-04-271-13/+23
| | | | | | | | | Turns out that this is needed after all to satisfy some strengthened coherency tests. Depends on support in LLVM, added in r267729. v2: updated to reflect changes to the LLVM intrinsic Reviewed-by: Marek Olšák <[email protected]> (v1)
* swr: [rasterizer] warning cleanupTim Rowley2016-04-279-74/+27
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] implement legacy depth bias enableTim Rowley2016-04-274-21/+25
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] support for dumping x86 asmTim Rowley2016-04-272-0/+50
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] more backend refactoringTim Rowley2016-04-278-963/+573
| | | | | | | | | BackendPixelRate should be easier to read/maintain now hopefully. Small perf bump by moving some of the pfn's to inline functions without template params. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] add mSimdInt1TyTim Rowley2016-04-272-0/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] backend refactorTim Rowley2016-04-275-238/+633
| | | | | | | Lump all template args into a bundle of traits, and add some functionality to the MSAA traits. Reviewed-by: Bruce Cherniak <[email protected]>
* svga: use the SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS queryBrian Paul2016-04-271-0/+3
| | | | | | | | | | | Instead of a hard-coded 512. The query typically returns 65536 now. Fall back to 512 if the query fails as we do for vertex shaders (which should never happen). Note that we don't actually enforce this limit in our shaders but it gets reported via the glGetProgramivARB(GL_MAX_PROGRAM_INSTRUCTIONS_ARB) query. Reviewed-by: Charmaine Lee <[email protected]>
* nouveau: codegen: LOAD: Take src swizzle into accountHans de Goede2016-04-272-2/+9
| | | | | | | | | | | | | | | | | | | | | | The llvm TGSI backend uses pointers in registers and does things like: LOAD TEMP[0].y, MEMORY[0], TEMP[0] Expecting the data at address TEMP[0].x to get loaded to TEMP[0].y. But this will cause the data at TEMP[0].x + 4 to be loaded instead. This commit adds support for a swizzle suffix for the 1st source operand, which allows using: LOAD TEMP[0].y, MEMORY[0].xxxx, TEMP[0] And actually getting the desired behavior Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: codegen: LOAD: Do not call fetchSrc(1) if the address is immediateHans de Goede2016-04-271-2/+3
| | | | | | | | | | "off" later gets set to NULL when the address is immediate, so move the fetchSrc(1) call to the non-immediate branch of the if-else. This brings handleLOAD's offset handling inline with how it is done in handleSTORE. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: codegen: LOAD: Always use component 0 when getting the addressHans de Goede2016-04-271-1/+3
| | | | | | | | | | LOAD loads upto 4 components from the specified resource starting at the passed in x value of the 2nd source operand, the y, z and w components of the address should not be used. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* r600g: fix and optimize tgsi_cmp when using ABS and NEG modifierPatrick Rudolph2016-04-271-1/+10
| | | | | | | | | | | | | | Some apps set NEG and ABS on the source param to test for zero. Use ALU_OP3_CNDE insted of ALU_OP3_CNDGE and unset both modifiers. It also removes the need for a MOV instruction, as ABS isn't supported on op3. Tested on AMD CAYMAN and AMD RV770. Signed-off-by: Patrick Rudolph <[email protected]> Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add support for compute shaders. (v2)Dave Airlie2016-04-278-3/+369
| | | | | | | | | | | | | | | | | This enables ARB_compute_shader on softpipe. I've only tested this with piglit so far, and I hopefully plan on integrating it with my vulkan work. I'll get to testing it with deqp more later. The basic premise is to create up to 1024 restartable TGSI machines, and execute workgroups of those machines. v1.1: free machines. v2: deqp fixes - add samplers support, finish atomic operations, fix load/store writemasks. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: initialise SysSemanticToIndex array to -1Dave Airlie2016-04-271-0/+3
| | | | | | | | We want to use the SysSemanticToIndex to tell if we've seen the semantics at all. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: implement restartable machine.Dave Airlie2016-04-272-17/+35
| | | | | | | | | | | | | | This lets us restart the machine at a PC value, and exits the machine when we hit a barrier. Compute shaders will then execute all the threads up to the barrier, then restart the machines after the barrier once all are done. v2: comment the code a bit, change return types. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: make inputs/outputs optional for compute shaders.Dave Airlie2016-04-271-19/+24
| | | | | | | | compute shaders don't need input/outputs so don't bother allocating memory for these. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: implement load/store/atomic on MEMORY.Dave Airlie2016-04-272-3/+150
| | | | | | | | This implements basic load/store/atomic ops on MEMORY types for compute shaders. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: split out setting up masks to separate functionDave Airlie2016-04-271-9/+14
| | | | | | | | This is just a cleanup that will make later changes easier to make. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: accept a starting PC value for exec machine.Dave Airlie2016-04-275-5/+5
| | | | | | | | This will be used later to restart barriered execution threads in compute, for now we just want to change the API. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: move to using vector for system values.Dave Airlie2016-04-274-7/+7
| | | | | | | | | | For compute support some of the system values are .xyz types, so move to using a vector instead of a single channel. [airlied: squash swizzle fix from compute series]. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: fix system value handling.Dave Airlie2016-04-271-3/+5
| | | | | | | | | | | a) SysSemanticToIndex needs to be indexed with the semantic name not the decl->Declaration.Semantic. b) doing this in run is too late, as the mappings are all setup prior to run in the execs. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* swr: autogenerate swr_context_llvm.hTim Rowley2016-04-266-128/+16
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: Remove every double semi-colonJakob Sinclair2016-04-2610-15/+15
| | | | | | Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* gallium/r600: removing double semi-colonsJakob Sinclair2016-04-261-1/+1
| | | | | | | | | | Trivial change. Removing unnecessary semi-colons from the code. I don't have push access so someone reviewing this can push it. Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* radeonsi: add RW_BUFFERS only once in si_ce_needed_cs_spaceMarek Olšák2016-04-261-2/+2
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nvc0: expose GLSL version 420 on GK110Samuel Pitoiset2016-04-261-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: enable ARB_shader_image_load_store on GK110Samuel Pitoiset2016-04-261-1/+1
| | | | | | | This exposes 8 images for all shader types. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for VSHLSamuel Pitoiset2016-04-261-0/+58
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_SUEAU, OP_SUBFM and OP_SUCLAMPSamuel Pitoiset2016-04-261-0/+87
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_SULDB and OP_SUSTxSamuel Pitoiset2016-04-261-0/+155
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_MADSPSamuel Pitoiset2016-04-261-0/+23
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_PERMTSamuel Pitoiset2016-04-261-0/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: expose GLSL version 420 on GK104Samuel Pitoiset2016-04-261-0/+2
| | | | | | | Other chipsets will be added later. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: enable ARB_shader_image_load_store on GK104Ilia Mirkin2016-04-261-0/+2
| | | | | | | This exposes 8 images for all shader types. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: inform users that 3D images are not fully supportedSamuel Pitoiset2016-04-263-5/+10
| | | | | | | | | 3D images are a bit more complicated to implement and will probably requires a bunch of headaches and we don't care for now because they do not seem to be really used by apps. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: reduce GL_MAX_3D_TEXTURE_SIZE to 2048 on Kepler+Samuel Pitoiset2016-04-261-1/+1
| | | | | | | | | The blob sets it to 2048 and using 4096 reports an INVALID_DATA error with RT_ARRAY_MODE when z is 4096. Suggested by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nvc0/ir: check that the image format doesn't mismatchSamuel Pitoiset2016-04-263-2/+25
| | | | | | | | | | This re-uses NVE4_SU_INFO_CALL which is not used anymore because we don't use our lib for format conversions. While we are at it, add a todo for image buffers because there are some robustness-related issues to fix. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 20:42:56 +0000