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* iris: Drop copy format hacks from copy region based transfer path.Kenneth Graunke2019-08-221-16/+5
| | | | | | | | | | | | | | This doesn't work for compressed formats, as the source texture and temporary texture would have different block sizes. (Forcing the driver to always take the GPU path would expose the bug.) Instead, just use the source format for the temporary, and let blorp_copy deal with overrides. The one case where we can't do this is ASTC, because isl won't let us create a linear ASTC surface. Fall back to the CPU paths there for now. Fixes: 9d1334d2a0f ("iris: Use copy_region and staging resources to avoid transfer stalls") Reviewed-by: Rafael Antognolli <[email protected]>
* iris: Update fast clear colors on Gen9 with direct immediate writes.Kenneth Graunke2019-08-222-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gen11 stores the fast clear color in an "indirect clear buffer", as a packed pixel value. Gen9 hardware stores it as a float or integer value, which is interpreted via the format. We were trying to store that in a buffer, for similarity with Icelake, and MI_COPY_MEM_MEM it from there to the actual SURFACE_STATE bytes where it's stored. This unfortunately doesn't work for blorp_copy(), which does bit-for-bit copies, and overrides the format to a CCS-compatible UINT format. This causes the clear color to be interpreted in the overridden format. Normally, we provide the clear color on the CPU, and blorp_blit.c:2611 converts it to a packed pixel value in the original format, then unpacks it in the overridden format, so the clear color we use expands to the bits we originally desired. However, BLORP doesn't support this pack/unpack with an indirect clear buffer, as it would need to do the math on the GPU. On Gen11+, it isn't necessary, as the hardware does the right thing. This patch changes Gen9 to stop using an indirect clear buffer and simply do PIPE_CONTROLs with post-sync write immediate operations to store the new color over the surface states for regular drawing. BLORP continues streaming out surface states, and handles fast clear colors on the CPU. Fixes: 53c484ba8ac ("iris: blorp using resolve hooks") Reviewed-by: Rafael Antognolli <[email protected]>
* iris: Fix broken aux.possible/sampler_usages bitmask handlingKenneth Graunke2019-08-221-5/+6
| | | | | | | | | | | | | | | | | | | | | | For renderable surfaces, we allocate SURFACE_STATEs for each bit in res->aux.possible_usages. Sampler views use res->aux.sampler_usages. When pinning buffers, we call surf_state_offset_for_aux() to calculate the offset to the desired surface state. surf_state_offset_for_aux() took an aux_modes parameter, which should be one of those two fields. However...it was not using that parameter. It always used the broader res->aux.possible_usages field directly. One of the callers, update_clear_value(), was passing incorrect masks for this parameter. It iterated through the bits in order, using u_bit_scan(), which destructively modifies the mask. So each time we called it, the count of bits before our selected mode was 0, which would cause us to always update the SURFACE_STATE for ISL_AUX_USAGE_NONE, rather than updating each in turn. This was hidden by the earlier bug where surf_state_offset_for_aux() ignored the parameter. Fixes: 7339660e803 ("iris: Add aux.sampler_usages.") Reviewed-by: Rafael Antognolli <[email protected]>
* iris: Replace devinfo->gen with GEN_GENKenneth Graunke2019-08-221-22/+18
| | | | | | | This is genxml, we can compile out this code. Fixes: 26606672847 ("iris/gen8: Re-emit the SURFACE_STATE if the clear color changed.") Reviewed-by: Rafael Antognolli <[email protected]>
* panfrost: Implement gl_FragCoord correctlyAlyssa Rosenzweig2019-08-224-19/+19
| | | | | | | | Rather than passing through the transformed gl_Position, we can use the hardware-level varying for this, which will correctly handle gl_FragCoord.w Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove vertex buffer offset from its sizeAlyssa Rosenzweig2019-08-221-2/+5
| | | | | | | | | | | | | | | | | | | | | The offset is added to the base address, so we need to subtract it from the size to maintain the same end address and thus prevent a buffer overflow: end_address = start_address + size start_address' = start_address + offset size' = size - offset end_address' = start_address' + size' = (start_address + offset) + (size - offset) = (start_address + size) + (offset - offset) = start_address + size = end_address QED. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Validate MFBD tagsAlyssa Rosenzweig2019-08-221-1/+1
| | | | | | | | | These tags need to match up with what's actually described by the MFBD, so check this. Once this is checked, since the type and contents of the FBD are obvious from printing above, there's no need to explicitly mark off the framebuffer line. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* glx: Sync <GL/glxext.h> with KhronosAdam Jackson2019-08-221-4/+3
| | | | | | | | Minor fixups required to keep the prototypes matching and to remove mention of retired enums. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* swr: use LLVM version string instead of re-computing itEric Engestrom2019-08-221-2/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* llvmpipe: use LLVM version string instead of re-computing itEric Engestrom2019-08-221-2/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* iris/android: fix build and link with libmesa_intel_perfTapani Pälli2019-08-222-0/+2
| | | | | | Fixes: 0fd4359733e "iris/perf: implement routines to return counter info" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium/noop: Implement resource_get_paramKenneth Graunke2019-08-211-0/+23
| | | | | | | v2: Pass through to oscreen rather than faking it (review from Marek). Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Marek Olšák <[email protected]>
* gallium/rbug: Wrap resource_get_param if availableKenneth Graunke2019-08-211-0/+17
| | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/trace: Wrap resource_get_param if availableKenneth Graunke2019-08-211-0/+16
| | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/ddebug: Wrap resource_get_param if availableKenneth Graunke2019-08-211-0/+13
| | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add buffer and configs handling or fp16 formatsKevin Strasser2019-08-215-0/+51
| | | | | | | | | | | | | | | Expose configs when allow_fp16_configs has been enabled and DRI_LOADER_CAP_FP16 is set in the loader. Also, make kms_swrast_dri respect format bpp, to allow for allocating buffers wider than 32 bpp. Make fp16 opt-in for gallium. Signed-off-by: Kevin Strasser <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium: Use consistent approach for config format filteringKevin Strasser2019-08-211-8/+9
| | | | | | | rgb10 uses an 'if(allowed) continue' approach, do the same for rgba_ordering. Signed-off-by: Kevin Strasser <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* panfrost: Fix PIPE_BUFFER spacingAlyssa Rosenzweig2019-08-211-3/+3
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Implement depth range clippingAlyssa Rosenzweig2019-08-211-3/+12
| | | | | | | This should fix glDepthRangef issues. Eventually, something similar should allow implementing the depth bounds test. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Don't bail on PIPE_BUFFERAlyssa Rosenzweig2019-08-211-5/+5
| | | | | | We can handle some of it. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Pass stream_output_info by referenceAlyssa Rosenzweig2019-08-211-7/+7
| | | | | | It's a large structure, apparently. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Guard against NULL rasterizer explicitlyAlyssa Rosenzweig2019-08-211-1/+3
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Fix missing ret assignment in DRM codeAlyssa Rosenzweig2019-08-211-1/+1
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Hoist bo != NULL check before dereferenceAlyssa Rosenzweig2019-08-211-3/+3
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Hoist job != NULL checkAlyssa Rosenzweig2019-08-211-3/+1
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Prevent potential integer overflow in instancingAlyssa Rosenzweig2019-08-211-1/+1
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Clarify intention with PIPE_SWIZZLE_X checkAlyssa Rosenzweig2019-08-211-1/+2
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Pay attention to framebuffer dimension signAlyssa Rosenzweig2019-08-211-9/+2
| | | | | | These are unsigned so the clamp-positive is redundant. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Don't check reads_point_coordAlyssa Rosenzweig2019-08-211-1/+1
| | | | | | Useless check. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* nir: Add explicit signs to image min/max intrinsicsJason Ekstrand2019-08-213-30/+60
| | | | | | | | | | | This better matches all the other atomic intrinsics such as those for SSBOs and shared variables where the sign is part of the intrinsic opcode. Both generators (GLSL and SPIR-V) know the sign from the type of the image variable or handle. In SPIR-V, signed min/max are separate opcodes from unsigned. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* panfrost: Break up usage2 fieldAlyssa Rosenzweig2019-08-211-19/+10
| | | | | | This is another bit field describing layout. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove ancient TODOAlyssa Rosenzweig2019-08-211-2/+0
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: nr_mipmap_levels -> levelsAlyssa Rosenzweig2019-08-211-1/+1
| | | | | | No need to be so verbose. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Don't crash on GL_CLAMPAlyssa Rosenzweig2019-08-211-0/+2
| | | | | | | It's a legacy GL thing... we don't really need to handle it *right* now, but we shouldn't crash.. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Do not expose PIPE_CAP_TEXTURE_MIRROR_CLAMPAlyssa Rosenzweig2019-08-211-1/+0
| | | | | | | This CAP controls a desktop-only extension. If the corresponding support exists in the hardware, we don't know how to use it. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Fix scoreboarding with dependency on job #0Alyssa Rosenzweig2019-08-211-4/+6
| | | | | | | Subtle issue masked by how we emitted SET_VALUE jobs, but this case can and does occur, so let's fix it. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Check for a number of potential issuesAlyssa Rosenzweig2019-08-211-2/+2
| | | | | | | | Verify sizes / masks / etc against something logical to cull down the trace space and automatically guard against a number of potential hazards. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Correct polygon size computationsAlyssa Rosenzweig2019-08-211-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | While the algorithm for computing the header size has been correct for a while, we used a major hack to conservatively guess the body size. Let's scrap that and figure out the algorithm we actually need to use to be bit-identical with what the hardware expects. We do have to be careful to add the header size to total comptued BO size. It's not clear how big the polygon list needs to be in practice -- but it has to be somewhat bigger than the polygon list itself. This needs more investigation. If we size the polygon list exactly based on the polygon_list_size field, we get faults like: [ 1224.219886] panfrost ff9a0000.gpu: Unhandled Page fault in AS0 at VA 0x000000001BDE8000 Reason: TODO raw fault status: 0x660003C3 decoded fault status: SLAVE FAULT exception type 0xC3: TRANSLATION_FAULT_LEVEL3 access type 0x3: WRITE source id 0x6600 Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove DRY_RUNAlyssa Rosenzweig2019-08-211-6/+0
| | | | | | Nobody uses this anymore anyway. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Move pan_tiler.c outside of GalliumAlyssa Rosenzweig2019-08-214-341/+0
| | | | | | The routines in this file may be shared with Vulkan. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Set workgroups z to 32 for non-instanced graphicsAlyssa Rosenzweig2019-08-211-1/+1
| | | | | | | | This is a blob quirk; in so much as I know, the hardware doesn't care. But we're trying to be bit-identical to take as much entropy out of traces as possible, so let's introduce the quirk. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Move pan_invocation to shared panfrost/Alyssa Rosenzweig2019-08-213-154/+2
| | | | | | | | The routines in this file have no dependency on Gallium. Let's share them so they can be used for a theoretical future Vulkan driver or, more immediately, consulted when tracing. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/ci: Print load statsTomeu Vizoso2019-08-211-0/+1
| | | | | | | | | | | | To help make sure we are running tests in the ideal number of threads, print load stats to make obvious when there's a problem with utilization. This will be specially useful when we run tests on a wider variety of devices. Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost/ci: Install qemu-arm-static into chrootTomeu Vizoso2019-08-211-0/+7
| | | | | | | | | | | Some runners may be configured such that the qemu binary might not be available by the time we need to start running commands within the chroot. So make sure that it's there to avoid suprising problems in that case. Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost/ci: Build kernel with CONFIG_DETECT_HUNG_TASKTomeu Vizoso2019-08-211-2/+4
| | | | | | | | There's lots of locking changes going into the Panfrost kernel driver, so better be prepared. Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost/ci: Print bootstrap logTomeu Vizoso2019-08-211-0/+3
| | | | | | | | | A number of things can go wrong when building the rootfs from within a non-native chroot, so make sure to print the bootstrap.log so we can tell what's going on. Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost/ci: Use Volt-based runner for dEQP testsTomeu Vizoso2019-08-216-392/+1032
| | | | | | | | | | | | | | | | | | It's able to run tests in parallel, fully utilizing the HW and shortening considerable the time it takes. Needed to disable tests in RK3288 for now because Volt doesn't support armhf yet, though this should be fixed soon. Tests are now run with --deqp-gl-config-name=rgba8888d24s8ms0, so we are hitting a few more failures in tests that previously were being skipped. The time to run the tests decreases from around 8 minutes to 1:45 minutes, allowing for extending coverage without increasing CI times too much. Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* radeonsi: take reference glsl types for compile threadsLionel Landwerlin2019-08-211-0/+8
| | | | | | | | | | | | | An application quitting before the destroying its GL context and binding a NULL context might still have a radeonsi compiler thread running and potentially still accessing the types. Therefore take a reference for the duration of the threads' lifetime. v2: Only ref the glsl types, the builtins should be used by the time shader data gets to a gallium driver. Signed-off-by: Lionel Landwerlin <[email protected]>
* gallium/vl: use compute preference for all multimedia, not just blitIlia Mirkin2019-08-206-7/+7
| | | | | | | | | | | | The compute paths in vl are a bit AMD-specific. For example, they (on nouveau), try to use a BGRX8 image format, which is not supported. Fixing all this is probably possible, but since the compute paths aren't in any way better, it's difficult to care. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213 Fixes: 9364d66cb7 (gallium/auxiliary/vl: Add video compositor compute shader render) Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* lima/ppir: use ra_get_best_spill_node to select spill node19.2-branchpointErico Nunes2019-08-201-7/+22
| | | | | | | | | | | | ra_get_best_spill_node is what other users of the mesa register allocator use. Switching to it now also fixes an infinite loop issue with ppir regalloc with the ppir control flow patchset, and also provides a small gain over the previous herusitic on number of spilled nodes testing with shader-db. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Vasily Khoruzhick <[email protected]>
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