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* etnaviv: Make sure rs alignment checks matchGuido Günther2018-11-151-6/+13
| | | | | | | | | | | | | | | | | | etna_resource_alloc and etna_resource_from_handle currently use different checks. This leads to etna_resource_from_handle:492: target=2, format=PIPE_FORMAT_B8G8R8X8_UNORM, 1080x1920x1, array_size=1, last_level=0, nr_samples=0, usage=0, bind=8000a, flags=0 etna_resource_from_handle:541: BO stride 4320 is too small for RS engine width padding (4352, format PIPE_FORMAT_B8G8R8X8_UNORM) since etna_resource_from_handle wants to be aligned to a 16 byte boundary while the etna_resource_alloc does not. Adjust the two checks by using a common function. Broken by baff59ebf07a114f95ad66d1f54e4b1f409eebee Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* radeonsi: fix video APIs on Raven2Marek Olšák2018-11-142-4/+8
| | | | | | | | This was missed when I added the new enum. Cc: 18.3 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/xa: Bump minorThomas Hellstrom2018-11-141-1/+1
| | | | | | | | Bump minor to signal support for new formats and higher precision solid pictures. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/xa: Support Component Alpha with trivial blendingThomas Hellstrom2018-11-143-17/+35
| | | | | | | | | Support Component Alpha for those composite operations that do not require per-channel alpha blending. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
* st/xa: Minor renderer cleanupsThomas Hellstrom2018-11-141-12/+12
| | | | | | | | | constify function arguments to clean up the code a bit. Reported-by: Brian Paul <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
* st/xa: Fix transformations when we have both source and mask samplersThomas Hellstrom2018-11-141-68/+49
| | | | | | | | | In the case when we had both source and mask samplers, transformations were typically not applied correctly. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
* st/xa: Support a couple of new formatsThomas Hellstrom2018-11-142-9/+29
| | | | | Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/xa: Support higher color precision for solid picturesThomas Hellstrom2018-11-142-26/+100
| | | | | | | | The only solid fill picture type we supported only had 8 bit color channels. Add a new solid picture type that supports float channels. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/xa: Render update. Better support for solid picturesThomas Hellstrom2018-11-145-440/+225
| | | | | | | | | | | | Remove unused and obsolete code for gradients and component-alpha Support solid source- and mask pictures using a variable number of samplers in the composite pipeline rather than the fixed number we used before. Tested using rendercheck for XA. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* virgl: Add command and flags to initiate debugging on the host (v2)Gert Wollny2018-11-135-0/+37
| | | | | | | | | | | | On the host VREND_DEBUG=guestallow must be set to let the guest override the debug flags. v2: Send flag string instead of flags, this avoids the need to keep the flags in sync. v3: Only request host logging if the host actually understands the command Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]>
* freedreno/drm: fix unused 'entry' warningsRob Clark2018-11-121-2/+0
| | | | | | | Looks like importing libdrm_freedreno into mesa crossed paths with e27902a2613. Signed-off-by: Rob Clark <[email protected]>
* st/nine: clean up thead shutdown sequence a bitAndre Heider2018-11-091-4/+2
| | | | | | | Just break out of the loop instead, it does the same thing. Signed-off-by: Andre Heider <[email protected]> Reviewed-by: Axel Davy <[email protected]>
* st/nine: plug thread related leaksAndre Heider2018-11-092-0/+9
| | | | | Signed-off-by: Andre Heider <[email protected]> Reviewed-by: Axel Davy <[email protected]>
* st/nine: fix stack corruption due to ABI mismatchAndre Heider2018-11-091-1/+13
| | | | | | | | | | | | | | This fixes various crashes and hangs when using nine's 'thread_submit' feature. On 64bit, the thread function's data argument would just be NULL. On 32bit, the data argument would be garbage depending on the compiler flags (in my case -march>=core2). Fixes: f3fa7e3068512d ("st/nine: Use WINE thread for threadpool") Cc: [email protected] Signed-off-by: Andre Heider <[email protected]> Reviewed-by: Axel Davy <[email protected]>
* radeonsi: stop command submission with PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET onlyMarek Olšák2018-11-0915-20/+27
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium: add PIPE_CONTEXT_LOSE_CONTEXT_ON_RESETMarek Olšák2018-11-091-0/+3
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeonsi: don't set the CB clear color registers for 0/1 clear colors on Raven2Marek Olšák2018-11-094-3/+11
| | | | and add has_dcc_constant_encode.
* radeonsi: use better DCC clear codesMarek Olšák2018-11-091-5/+21
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallivm: fix improper clamping of vertex index when fetching gs inputsRoland Scheidegger2018-11-091-10/+31
| | | | | | | | | | | | | | | | | | | | Because we only have one file_max for the (2d) gs input file, the value actually represents the max of attrib and vertex index (although I'm not entirely sure if we really want the max, since the max valid value of the vertex dimension can be easily deduced from the input primitive). Thus in cases where the number of inputs is higher than the number of vertices per prim, we did not properly clamp the vertex index, which would result in out-of-bound fetches, potentially causing segfaults (the segfaults seemed actually difficult to trigger, but valgrind certainly wasn't happy). This might have happened even if the shader did not actually try to fetch bogus vertices, if the fetching happened in non-active conditional clauses. To fix simply use the correct max vertex index value (derived from the input prim type) instead when clamping for this case. Reviewed-by: Jose Fonseca <[email protected]>
* gm107/ir: fix compile time warning in getTEXSMaskKarol Herbst2018-11-071-0/+1
| | | | | | | | | | | In function 'uint8_t nv50_ir::getTEXSMask(uint8_t)': warning: control reaches end of non-void function [-Wreturn-type] Reported-by: Moiman@freenode Fixes: f821e80213e38e93f96255b3deacb737a600ed40 "gm107/ir: use scalar tex instructions where possible" Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* winsys/amdgpu: Stop using amdgpu_bo_handle_type_kms_noimportMichel Dänzer2018-11-071-3/+3
| | | | | | | | | It only behaves any different from amdgpu_bo_handle_type_kms with libdrm 2.4.93, and it breaks if an older version is picked up. Bugzilla: https://bugs.freedesktop.org/108096 Reviewed-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gm107/ir: use scalar tex instructions where possibleKarol Herbst2018-11-062-3/+317
| | | | | | | | | | | | | | | | | | | TEXS, TLD4 and TLD4S are variants of tex instructions which are more scalar, which gives RA more freedom and is less likely to insert silly MOVs to satisfy quad registers. shader-db changes: total instructions in shared programs : 7687265 -> 7614782 (-0.94%) total gprs used in shared programs : 803620 -> 798045 (-0.69%) total shared used in shared programs : 639636 -> 639636 (0.00%) total local used in shared programs : 24648 -> 24648 (0.00%) total bytes used in shared programs : 82103400 -> 81330696 (-0.94%) local shared gpr inst bytes helped 0 0 3648 10647 10647 hurt 0 0 464 205 205 Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: add scalar field to TexInstructionsKarol Herbst2018-11-062-1/+6
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ra: add condenseDef overloads for partial condensesKarol Herbst2018-11-061-8/+21
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: print color masks of tex instructionsKarol Herbst2018-11-061-4/+33
| | | | | | | v2: print the mask for TXG as well make the mask to be printed more mask like Reviewed-by: Ilia Mirkin <[email protected]>
* r600: Add support for EXT_texture_sRGB_R8Gert Wollny2018-11-061-0/+1
| | | | | | | | | | | Enables on R600 and makes pass: dEQP-GLES31.functional.srgb_texture_decode.skip_decode.sr8.* dEQP-GLES31.functional.texture.filtering.cube_array.formats.sr8* v2: remove chunk for dri/radeon (Emil) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* freedreno/a6xx: Clear z32 and separate stencil with blitterKristian H. Kristensen2018-11-062-27/+50
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: fix VSC bug with larger # of tilesRob Clark2018-11-061-5/+2
| | | | | | | | | | At higher resolutions with the addition of MSAA, the number of tiles can increase to the point where we use more than one VSC pipe per tile. Which would cause us to calculate an out-of-bounds offset for VSC_SIZE_ADDRESS. So don't try to be clever, just always put it at a fixed offset assuming the max 32 VSC pipes in use. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-11-067-29/+51
| | | | Signed-off-by: Rob Clark <[email protected]>
* st/va: fix incorrect use of resource_destroyMarek Olšák2018-11-051-4/+2
| | | | | | | Fixes: 4373dd32154 ("st/va: Support YUV formats in vaCreateSurfaces") Cc: Drew Davenport <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600/sb: Fix constant logical operand in assert.Vinson Lee2018-11-041-1/+1
| | | | | | Fixes: da977ad90747 ("r600/sb: start adding GDS support") Signed-off-by: Vinson Lee <[email protected]> Reviewed-By: Gert Wollny <[email protected]>
* vc4: Use the normal simulator ioctl path for CL submit as well.Eric Anholt2018-11-023-13/+5
| | | | The simulator no longer needs to look back into the gallium structs.
* vc4: Maintain a separate GEM mapping of BOs in the simulator.Eric Anholt2018-11-022-42/+58
| | | | This will let us avoid looking back into the gallium driver's vc4_bo.
* vc4: Take advantage of _mesa_hash_table_remove_key() in the simulator.Eric Anholt2018-11-021-4/+2
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* v3d: Remove the special path for simulaton of the submit ioctl.Eric Anholt2018-11-025-19/+13
| | | | | Now that it doesn't need to find the struct v3d_bos, it can just take the normal v3d_ioctl() path.
* v3d: Maintain a mapping of the GEM buffer in the simulator.Eric Anholt2018-11-021-23/+48
| | | | | This way we don't need to reach back into the gallium driver code to get the mapping.
* meson: link gallium nine with pthreadsDylan Baker2018-11-021-1/+1
| | | | | | | | | | | | In some cases (not building with llvm, which automatically pulls in pthreads) nine needs to be directly linked with pthreads. Fixes building on x86 (32 bit) without llvm. Distro bug: https://bugs.gentoo.org/670094 Fixes: 6b4c7047d57178d3362a710ad503057c6a582ca3 ("meson: build gallium nine state_tracker") Tested-by: Rafal Lalik <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* android: gallium/auxiliary: add include to get u_debug.h headerMauro Rossi2018-11-021-1/+2
| | | | | | | | | | | | | | | To avoid build error in u_debug_stack_android.cpp due to now missing u_debug.h header: external/mesa/src/gallium/auxiliary/util/u_debug_stack_android.cpp:26:10: fatal error: 'u_debug.h' file not found #include "u_debug.h" ^ 1 error generated. Fixes: 37db383abb ("util: Move u_debug to utils") Signed-off-by: Mauro Rossi <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* virgl/vtest-winsys: Use virgl version of bind flagsGert Wollny2018-11-021-1/+1
| | | | | | | | | | The bind flags defined by mesa/gallium might not always be in sync with the ones copied to virglrenderer/gallium. Therefore, use the flags defined in virgl like it is done for all the other calls to create resources. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* Gallium: Add format PIPE_FORMAT_R8_SRGBGert Wollny2018-11-025-0/+12
| | | | | | | | | | | | | | | | | | | | | | | This format is needed to support EXT_texture_sRGB_R8. THe patch adds a new format enum, the format entries in Gallium and and svga, the mapping between sRGB and linear formats, and tests. v2: - add mapping to linear format for PIPE_FORMATR_R8_SRGB v3: - Add texture format to svga format table since otherwise building mesa will fail when this driver is enabled. It was not tested whether the extension actually works. v4: - svga: remove the SVGA specific format definitions and table entries and only add correct the location of PIPE_FORMAT_R8_SRGB in the format_conversion_table (Ilia Mirkin) - Split patch (1/2) to separate Gallium part and mesa/st part. (Roland Scheidegger) - Trim the commit message to only contain the relevant parts from the split. v5: - svga: correct location of PIPE_FORMAT_SRGB_R8 (Ilia Mirkin) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* vc4: Drop the winsys_stride relayout in the simluatorEric Anholt2018-11-015-95/+12
| | | | | | | Since 0c1dd9dee0da ("broadcom/vc4: Allow importing linear BOs with arbitrary offset/stride."), we have the vc4-side BO properly laid out (assuming it's linear) in the winsys BO so that we can skip this extra copy.
* v3d: Use the TLB R/B swapping instead of recompiles when available.Eric Anholt2018-11-014-3/+17
| | | | | | The recompile reduction is nice, but this also makes it so that a straight texture copy could get optimized some day to not unpack/repack the f16 values.
* v3d: Take advantage of _mesa_hash_table_remove_key() in the simulator.Eric Anholt2018-11-011-4/+2
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* v3d: Respect user-passed strides for BO imports.Eric Anholt2018-11-015-96/+19
| | | | | | | If the caller has passed in a stride for (linear) BO import, we should use that stride when rendering to the BO (or, if we some day support texturing from linear-imported BOs, when doing the linear-to-UIF shadow copy). This lets us remove the extra stride-changing relayout in the simulator.
* v3d: Drop #if 0-ed out v3d_dump_to_file().Eric Anholt2018-11-011-91/+0
| | | | | | This came from vc4, where we had a file format for GPU hangs. I don't have one of those for V3D, and I probably won't ever have the simulator side produce dumps even if I do.
* v3d: Fix a typo in a comment in job handling.Eric Anholt2018-11-011-1/+1
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* v3d: Fix a copy-and-paste comment in the simulator code.Eric Anholt2018-11-011-1/+1
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* freedreno: Do not link ir3_compiler with valgrind libraries.Vinson Lee2018-10-311-2/+1
| | | | | | | | | | | | | | | | | | | This patch fixes this freedreno autotools build error. CXXLD ir3_compiler /usr/lib/valgrind/libcoregrind-amd64-linux.a(libcoregrind_amd64_linux_a-m_main.o): In function `_start': (.text+0x0): multiple definition of `_start' /usr/lib/gcc/x86_64-linux-gnu/7/../../../x86_64-linux-gnu/Scrt1.o:(.text+0x0): first defined here /usr/bin/ld: /usr/lib/valgrind/libcoregrind-amd64-linux.a(libcoregrind_amd64_linux_a-m_main.o): relocation R_X86_64_32S against undefined symbol `vgPlain_interim_stack' can not be used when making a PIE object; recompile with -fPIC /usr/bin/ld: /usr/lib/valgrind/libcoregrind-amd64-linux.a(libcoregrind_amd64_linux_a-m_trampoline.o): relocation R_X86_64_32 against `.text' can not be used when making a PIE object; recompile with -fPIC /usr/bin/ld: /usr/lib/valgrind/libcoregrind-amd64-linux.a(libcoregrind_amd64_linux_a-dispatch-amd64-linux.o): relocation R_X86_64_32S against symbol `vgPlain_stats__n_xindirs_32' can not be used when making a PIE object; recompile with -fPIC /usr/bin/ld: final link failed: Nonrepresentable section on output collect2: error: ld returned 1 exit status Fixes: f3cc0d274756 ("freedreno: import libdrm_freedreno + redesign submit") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108595 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* configure: allow building with python3Emil Velikov2018-10-315-5/+5
| | | | | | | | | | | | | | | Pretty much all of the scripts are python2+3 compatible. Check and allow using python3, while adjusting the PYTHON2 refs. Note: - python3.4 is used as it's the earliest supported version - python2 chosen prior to python3 v2: use python2 by default Cc: Ilia Mirkin <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* Revert "imx: make use of loader_open_render_node(..) helper"Christian Gmeiner2018-10-311-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 773d6ea6e715d207bda3a53a9dfc8acf686035b0. Since kernel 4.17 (drm/etnaviv: remove the need for a gpu-subsystem DT node) the etnaviv DRM driver doesn't have an associated DT node anymore. This is technically correct, as the etnaviv device is a virtual device driving multiple hardware devices. Before 4.17 the userspace had access to the following information: DRIVER=etnaviv OF_NAME=gpu-subsystem OF_FULLNAME=/gpu-subsystem OF_COMPATIBLE_0=fsl,imx-gpu-subsystem OF_COMPATIBLE_N=1 MODALIAS=of:Ngpu-subsystemT<NULL>Cfsl,imx-gpu-subsystem DRIVER=imx-drm OF_NAME=display-subsystem OF_FULLNAME=/display-subsystem OF_COMPATIBLE_0=fsl,imx-display-subsystem OF_COMPATIBLE_N=1 Afer 4.17: DRIVER=etnaviv MODALIAS=platform:etnaviv The OF node has never been part of the etnaviv UABI, simply due to the fact that it's still possible to instantiate the etnaviv driver from a platform file, instead of a devicetree node. A patch set to fix this problem was send out [1] but it looks like that a proper solution needs more time to bake. [1] https://lists.freedesktop.org/archives/dri-devel/2018-October/194651.html Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Christian Gmeiner <[email protected]>
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