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* nvc0: fix up video buffer alignment requirementsMaarten Lankhorst2013-06-081-5/+3
| | | | Signed-off-by: Maarten Lankhorst <[email protected]>
* freedreno: better scissor fixRob Clark2013-06-085-28/+43
| | | | | | Actually respect rasterizer state. Signed-off-by: Rob Clark <[email protected]>
* freedreno: gmem bypassRob Clark2013-06-087-30/+168
| | | | | | | | | | | | | The GPU (at least a3xx, but I think also a2xx) can render directly to memory, bypassing tiling. Although it can't do this if blend, depth, and a few other features of the pipeline are enabled. This direct memory mode can be faster for some sorts of operations, such as simple blits. In particular, this significantly speeds up XA by avoiding to pull the entire dest pixmap into GMEM, render tiles, and write it all back out again. This should also speed up resource copy-region and blit. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add a3xx supportRob Clark2013-06-0835-3/+8955
| | | | | | | | | | | | | | | | | | | | The adreno a3xx GPU is found in newer snapdragon devices, such as the nexus4. The a3xx is GLESv3 and OpenCL capable, although that is not enabled yet in gallium. Compared to a2xx, it introduces an entirely new unified shader ISA, and re-shuffles all or nearly all of the registers. The good news is that (for the most part) the registers are more orthogonal, not combining unrelated state in a single register. And that there is a lot more flexibility, so we don't need to patch and re-emit the shader like we did on a2xx. The shader compiler is currently quite dumb, there would be a lot of room for improvement with an optimizing pass. Despite that, with the a320 in my nexus4 it seems to be ~2-3x faster compared to the a220 in my HP touchpad. Signed-off-by: Rob Clark <[email protected]>
* freedreno: prepare for a3xxRob Clark2013-06-0849-2008/+2798
| | | | | | | | Split the parts that are specific to adreno a2xx series GPUs from the parts that will be in common with a3xx, so that a3xx support can be added more cleanly. Signed-off-by: Rob Clark <[email protected]>
* gallivm: work around slow code generated for interleaving 128bit vectorsRoland Scheidegger2013-06-081-0/+22
| | | | | | | | | | | | | | | We use 128bit vector interleave for untwiddling in the blend code (with 256bit vectors). llvm generates terrible code for this for some reason, so instead of generating a shuffle for 2 128bit vectors use a extract/insert shuffle instead (it only seems to matter we're not using 128bit wide vectors for the shuffle). This decreases instruction count of the blend code generated for a rgba8 render target without blending from 169 to 113 with llvm 3.1 and from 136 to 114 in llvm 3.2/3.3, and I got a ~8% (llvm 3.1) and ~5% (3.2/3.3) performance improvement in gears. (The generated code is still not terribly good as we could actually avoid the interleaving completely but llvm can't know this.) Reviewed-by: Jose Fonseca <[email protected]>
* st/xlib: Flush the front buffer before doing CopySubBufferStéphane Marchesin2013-06-071-0/+4
| | | | | | | | | We flush pending rendering before running CopySubBuffer, which ensures that the right bits get to the screen. NOTE: This is a candidate for stable release branches. Reviewed-by: Brian Paul <[email protected]>
* st/xlib: Fix upside down coordinates for CopySubBufferStéphane Marchesin2013-06-071-1/+1
| | | | | | | | The coordinates need to be inverted between glX and gallium. NOTE: This is a candidate for stable release branches. Reviewed-by: Brian Paul <[email protected]>
* util: add comment about bogus transfer flagsRoland Scheidegger2013-06-071-0/+1
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* util: fix util_clear_render_target and util_clear_depth_stencil layer handlingRoland Scheidegger2013-06-071-87/+103
| | | | | | | These functions must clear all bound layers, not just the first. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: move create_surface/destroy_surface functions to lp_surface.cRoland Scheidegger2013-06-072-59/+59
| | | | | | | Believe it or not but these two are actually the first two functions which really belong in this file nowadays. Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: add support for layered renderingRoland Scheidegger2013-06-0715-110/+195
| | | | | | | | | | | | | | | | Mostly just make sure the layer parameter gets passed through to the right places (and get clamped, can do this at setup time), fix up clears to clear all layers and disable opaque optimization. Luckily don't need to touch the jitted code. (Clears invoked via pipe's clear_render_target method will not work however since the pipe_util_clear function used for it doesn't handle clearing multiple layers yet.) v2: per Brian's suggestion, prettify var initialization and add some comments, add assertion for impossible layer specification for surface. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* gallium/docs: fix up transfer description for 1d arrays, add cube map arraysRoland Scheidegger2013-06-071-5/+4
| | | | | | | | | | | Transfers always use z/depth for layers no matter if it's a 1d or 2d array texture, we don't follow OpenGL's crazyness there. Luckily this appears to only be a doc bug, everyone doing the right thing already. While here also document z/depth parameter for cube map arrays. v2: fix typo spotted by Eric Anholt Reviewed-by: Jose Fonseca <[email protected]>
* ilo: fix textureSize() for single-layered array texturesChia-I Wu2013-06-081-2/+18
| | | | | We returned 0 instead of 1 for the number of layers when the array texutre is single-layered. This fixed it on GEN7+.
* util: add util_resource_is_array_texture()Chia-I Wu2013-06-081-1/+19
| | | | | | | | Checking if array_size is greater than 1 is not enough for single-layered array textures. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: Remove draw_arrays() and draw_arrays_instanced() functionsArnas Milasevicius2013-06-072-51/+0
| | | | | | | | Moved draw_arrays() to st_draw_feedback.c and removed draw_arrays_instanced(). draw_arrays() was used by nobody else. Now there's just one "draw" entrypoint into the draw module. Signed-off-by: Brian Paul <[email protected]>
* tgsi: replace tgsi_file_names tgsi_file_names[] with tgsi_file_name() functionBrian Paul2013-06-077-18/+30
| | | | | | | | | This change came from the discovery that the STATIC_ASSERT to check that the number of register file strings didn't actually work. Similar changes could be made for the other string arrays in tgsi_string.c Reviewed-by: Jose Fonseca <[email protected]>
* u_vbuf: fix index buffer leakChia-I Wu2013-06-071-0/+3
| | | | | Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ilo: advertise PIPE_CAP_CUBE_MAP_ARRAYChia-I Wu2013-06-071-2/+1
| | | | | It was supported but not advertised. Also remove TODO tag for PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT, as it is not a TODO.
* ilo: add support for TEX2/TXB2/TXL2 in fsChia-I Wu2013-06-071-3/+3
| | | | They were already supported, just being rejected in the TGSI translator.
* ilo: use slab allocator for transfersChia-I Wu2013-06-074-28/+39
| | | | | Slab allocator is perfect for transfer. Improved OpenArena performance by 1% with several casual runs.
* ilo: clean up states upon context destroyChia-I Wu2013-06-071-0/+38
| | | | We need to unreference resources that we referenced.
* ilo: unmap cp bo before destroying itChia-I Wu2013-06-071-1/+6
| | | | | The BOs are mapped in their entire life times for the chipsets we support so do not forget to unmap it.
* ilo: enable bo reuseChia-I Wu2013-06-071-0/+2
| | | | This magical line of code must have got lost at some point in the history...
* ilo: construct 3DSTATE_SF in create_rasterizer_state()Chia-I Wu2013-06-077-164/+194
| | | | Add ilo_rasterizer_sf and initialize it in create_rasterizer_state().
* ilo: construct 3DSTATE_CLIP in create_rasterizer_state()Chia-I Wu2013-06-075-50/+86
| | | | Add ilo_rasterizer_clip and initialize it in create_rasterizer_state().
* ilo: use emit_SURFACE_STATE() for render targetsChia-I Wu2013-06-079-127/+52
| | | | | | Introduce ilo_surface_cso and initialize it in create_surface(). With the change, we can emit SURFACE_STATE directly from the CSO and remove emit_surf_SURFACE_STATE(). We do not deal with depth/stencil surfaces yet.
* ilo: use emit_SURFACE_STATE() for constant buffersChia-I Wu2013-06-079-70/+26
| | | | | | Introduce ilo_cbuf_cso and initialize it in set_constant_buffer(). As ilo_view_surface is embedded in ilo_cbuf_cso, switch to emit_SURFACE_STATE() for constant buffers and remove emit_cbuf_SURFACE_STATE().
* ilo: add emit_SURFACE_STATE() for sampler viewsChia-I Wu2013-06-0710-99/+69
| | | | | | Introduce ilo_view_cso and initialize it in create_sampler_view(). Add emit_SURFACE_STATE() to GPE, which can emit SURFACE_STATE from ilo_view_surface.
* ilo: add ilo_view_surface for SURFACE_STATEChia-I Wu2013-06-073-125/+268
| | | | Define struct ilo_view_surface for SURFACE_STATE construction and emission.
* ilo: convert generic depth-stencil-alpha pipe state to ilo pipe stateCourtney Goeltzenleuchter2013-06-076-21/+51
| | | | | | | | | Moving the work to create time reduces the work at emit time. Saves time overall as create work is only done once. Fix compiler warning in gen7_pipeline_sol. [olv: remember pipe_alpha_state instead of pipe_depth_stencil_alpha_state in ilo_dsa_state]
* ilo: introduce vertex element CSOChia-I Wu2013-06-076-119/+227
| | | | | | | Introduce ilo_ve_cso and initialize it in create_vertex_elements_state(). This commit goes a step further by setting up mappings from HW VB to PIPE VB, which we failed to do previously. That allows us to support instanced rendering.
* ilo: simplify emit_3DSTATE_DEPTH_BUFFER()Chia-I Wu2013-06-076-63/+19
| | | | | | Remove hiz and dsa from the parameters. We would know whether HiZ buffer exists from ilo_texture once it is supported. DSA state should not affect 3DSTATE_DEPTH_BUFFER.
* ilo: introduce blend CSOChia-I Wu2013-06-076-97/+183
| | | | | Introduce ilo_blend_cso and initialize it in create_blend_state(). This saves us from having to construct hardware blend states in draw_vbo().
* ilo: introduce sampler CSOChia-I Wu2013-06-078-371/+447
| | | | | | Introduce ilo_sampler_cso and initialize it in create_sampler_state(). This saves us from having to perform CPU-intensive calculations to construct hardware sampler states in draw_vbo().
* ilo: construct SCISSOR_RECT in set_scissor_states()Chia-I Wu2013-06-077-26/+92
| | | | | | This allows us to memcpy() the state in draw_vbo(). Add ilo_init_states() and ilo_cleanup_states() that are called when contexts are created and destroyed respectively, and properly set the initial scissor state in ilo_init_states().
* ilo: introduce viewport CSOChia-I Wu2013-06-078-197/+197
| | | | | | Introduce ilo_viewport_cso and initialize it in set_viewport_states(). This saves us from having to perform CPU-intensive calculations to construct hardware viewport states in draw_vbo().
* ilo: switch to ilo states for shaders and resourcesChia-I Wu2013-06-077-114/+114
| | | | | | | | | | | | Define and use struct ilo_sampler_state; struct ilo_view_state; struct ilo_cbuf_state; struct ilo_resource_state; struct ilo_global_binding; in ilo_context.
* ilo: switch to ilo states for CC stageChia-I Wu2013-06-079-107/+119
| | | | | | | | | | Define and use struct ilo_dsa_state; struct ilo_blend_state; struct ilo_fb_state; in ilo_context.
* ilo: switch to ilo states for WM stageChia-I Wu2013-06-077-26/+33
| | | | | | | | Define and use struct ilo_rasterizer_state; in ilo_context.
* ilo: switch to ilo states for CLIP and SF stagesChia-I Wu2013-06-076-19/+49
| | | | | | | | | Define and use struct ilo_viewport_state; struct ilo_scissor_state; in ilo_context.
* ilo: switch to ilo states for SOL stageChia-I Wu2013-06-077-30/+29
| | | | | | | | Define and use struct ilo_so_state; in ilo_context.
* ilo: switch to ilo states for VF stageChia-I Wu2013-06-077-53/+55
| | | | | | | | | | Define and use struct ilo_vb_state; struct ilo_ve_state; struct ilo_ib_state; in ilo_context.
* ilo: move hardware limits to ilo_gpe.hChia-I Wu2013-06-072-22/+56
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* draw: trivial fix comment typoRoland Scheidegger2013-06-061-1/+1
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* gallium/tgsi: add missing string for layer semanticRoland Scheidegger2013-06-063-1/+8
| | | | | | Also report if a shader writes the layer semantic Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: bump 3d and cube map limits to 2048 and 8192 respectivelyRoland Scheidegger2013-06-061-2/+2
| | | | | | | These should just work, required by d3d10. Too large resources will get thrown out separately anyway. Reviewed-by: Brian Paul <[email protected]>
* radeon/winsys: correct RADEON_GEM_WAIT_IDLE useJonathan Gray2013-06-062-2/+2
| | | | | | | | | | | | RADEON_GEM_WAIT_IDLE is declared DRM_IOW but mesa uses it with drmCommandWriteRead instead of drmCommandWrite which leads to the ioctl being unmatched and returning an error on at least OpenBSD. Problem originally noticed in libdrm by Mark Kettenis. Dave Airlie pointed out that mesa has the same issue. Signed-off-by: Jonathan Gray <[email protected]>
* mesa: remove outdated version lines in commentsRico Schüller2013-06-0567-67/+0
| | | | Signed-off-by: Brian Paul <[email protected]>
* gallium: System z supportRichard Sandiford2013-06-052-2/+6
| | | | | | | | | The main change is to use MCJIT rather than the old JIT, which will never be supported for System z. The endianness part is by example since the patch was tested on a glibc system. Signed-off-by: Richard Sandiford <[email protected]> Signed-off-by: Brian Paul <[email protected]>
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