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* nouveau/codegen: add missing values for OP_TXLQ into the target arraysIlia Mirkin2014-04-192-7/+9
| | | | | | | | | | Also rework things so that if someone were to add an opcode without adjusting the values in these arrays, there will be a compilation error. This fixes a few quadop-related piglit regressions since commit d5faf8e78603. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: change logic for centering of eng2d blit when downsamplingIlia Mirkin2014-04-191-2/+2
| | | | | | | | We want to center the sample. The old code may have been correct given the limited values of ms_x/y, but the new logic should be more intuitive. Note that ms_x can only be 1/2 and ms_y can only be 0/1. Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: use 2d blit when src/dst have same number of samplesIlia Mirkin2014-04-191-4/+4
| | | | | | | | | | | The 2D engine should be usable in more cases, but this fixes MS blits between textures with the same MS settings. Otherwise a single sample is selected to be the target texel value. This allows other tests to work that render to a RB and then blit that to a texture for input into a shader that uses sampler2DMS to verify it. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium/docs: fix PIPE_CAP_ENDIANNESS delimiter, remove trailing spacesIlia Mirkin2014-04-191-4/+4
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* radeonsi: fix num banks selection on SI for dma setup (v2)Alex Deucher2014-04-183-24/+19
| | | | | | | | | | | | The number of banks varies based on the tile mode index just like CIK. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=77533 v2: fix ordering for nbanks calculation for consistency Signed-off-by: Alex Deucher <[email protected]>
* r600g,radeonsi: don't skip the context flush if a fence should be returnedMarek Olšák2014-04-182-2/+2
| | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77589
* svga: fix comment for emit_adjusted_vertex_attribs()Brian Paul2014-04-171-3/+3
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* svga: compute need_swvfetch in svga_create_vertex_elements_state()Brian Paul2014-04-173-13/+9
| | | | | | This saves us doing it at state validation time. Reviewed-by: Matthew McClure <[email protected]>
* svga: add VS code to set attribute W component to 1Brian Paul2014-04-175-46/+100
| | | | | | | | | | | | | | | There's a few 3-component vertex attribute formats that have no equivalent SVGA3D_DECLTYPE_x format. Previously, we had to use the swtnl code to handle them. This patch lets us use hwtnl for more vertex attribute types by fetching 3-component attributes as 4-component attributes and explicitly setting the W component to 1. This lets us handle PIPE_FORMAT_R16G16B16_SNORM/UNORM and PIPE_FORMAT_R8G8B8_UNORM vertex attribs without using the swtnl path. Fixes piglit normal3b3s GL_SHORT test. Reviewed-by: Charmaine Lee <[email protected]>
* svga: implement support for signed byte vertex attributesBrian Paul2014-04-176-14/+151
| | | | | | | | | | | | | | There's no SVGA3D_DECLTYPE that directly corresponds to PIPE_FORMAT_R8G8B8_SNORM. Previously, we used the swtnl fallback path to handle this but that's slow and causes invariance issues. Now we fetch the attribute as SVGA3D_DECLTYPE_UBYTE4N and insert some extra VS instructions to remap the attributes from the range [0,1] to the range[-1,1]. Fixes Sauerbraten sw fallback. Fixes piglit normal3b3s-invariance test. Reviewed-by: Charmaine Lee <[email protected]>
* svga: move translated vertex declaration types into svga_velems_stateBrian Paul2014-04-174-40/+45
| | | | | | | Now only translate the formats once in svga_create_vertex_elements_state(). And rename the array and use the proper SVGA3dDeclType type. Reviewed-by: Charmaine Lee <[email protected]>
* Revert "svga: add work-around for Sauerbraten Z fighting issue"Brian Paul2014-04-173-49/+2
| | | | | | | | | | | | This reverts commit c875d6e57a817bb6a8163a8a98ebd2768ee91848. Conflicts: src/gallium/drivers/svga/svga_context.c This work-around will no longer be needed after the next patch which properly supports signed-byte vertex attributes. Reviewed-by: Charmaine Lee <[email protected]>
* svga: use new inst_token_setp() helper functionBrian Paul2014-04-172-12/+26
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: use new inst_token_predicated() helper functionBrian Paul2014-04-172-13/+25
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* radeonsi: Added Diag Handler to receive LLVM Error messagesDarren Powell2014-04-173-9/+55
| | | | Reviewed-by: Tom Stellard <[email protected]>
* winsys/radeon: remove some unused codeMarek Olšák2014-04-171-28/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove is_handle_added arrayMarek Olšák2014-04-172-30/+34
| | | | | | Use index -1 if a buffer is not added. Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove local variable reloc from radeon_get_relocMarek Olšák2014-04-171-5/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove parameter reloc from radeon_get_relocMarek Olšák2014-04-172-11/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* util: Add __declspec(noreturn) to _debug_assert_fail().José Fonseca2014-04-171-0/+3
| | | | | | | | Mostly for consistency; as MSVC's static source code analysis doesn't seem to rely on assertions, but instead on different kind of source annotations( http://msdn.microsoft.com/en-us/library/hh916383.aspx ). Reviewed-by: Brian Paul <[email protected]>
* auxiliary/os,auxiliary/util: Fix the `‘noreturn’ function does return` ↵José Fonseca2014-04-172-5/+2
| | | | | | | | | | | | | | | | warning. Now that _debug_assert_fail() has the noreturn attribute, it is better that execution truly never returns. Not just for sake of silencing the warning, but because the code at the return IP address may be invalid or lead to inconsistent results. This removes support for the GALLIUM_ABORT_ON_ASSERT debugging environment variable, but between the usefulness of GALLIUM_ABORT_ON_ASSERT and better static code analysis I think better static code analysis wins. Reviewed-by: Brian Paul <[email protected]>
* nouveau/vdec: small fixes to h264 handlingMaarten Lankhorst2014-04-174-24/+24
| | | | | | | | | | | nouveau_vp3_inter_sizes requires sliec_count as argument just as the other places that call it from h264 code do. Hopefully fixes something. Fix the status_vp code to allow status == 0 too, when processing hasn't started yet. set h264->second_field correctly.
* st/xa: Cache render target surfaceThomas Hellstrom2014-04-171-3/+15
| | | | | | | | | | | | | | | | Otherwise it will trick the gallium driver into thinking that the render target has actually changed (due to different pipe_surface pointing to same underlying pipe_resource). This is really badness for tiling GPUs like adreno. This also appears to fix a rendering error with Motif on vmwgfx. Why that is is still under investigation. Based on an idea by Rob Clark. Cc: "10.0 10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* st/xa: scissor to help tilersRob Clark2014-04-174-0/+48
| | | | | | | | | | | | | | Keep track of the maximal bounds of all the operations and set scissor accordingly. For tiling GPU's this can be a big win by reducing the memory bandwidth spent moving pixels from system memory to tile buffer and back. You could imagine being more sophisticated and splitting up disjoint operations. But this simplistic approach is good enough for the common cases. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* st/xa: remove unneeded argsRob Clark2014-04-175-12/+8
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* r600g: Disable LLVM by default at runtime for graphicsMichel Dänzer2014-04-173-5/+5
| | | | | | | | | | | | | | | | | For graphics, the LLVM compiler backend currently has many shortcomings compared to the non-LLVM one. E.g. it can't handle geometry shaders yet, but that's just the tip of the iceberg. So building Mesa with --enable-r600-llvm-compiler is currently not recommended for anyone who doesn't want to work on fixing those issues. However, for protection of users who end up enabling it anyway for some reason, let's disable the LLVM backend at runtime by default. It can be enabled with the environment variable R600_DEBUG=llvm. Cc: "10.1" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* gallivm: fix compilation with llvm 3.5 r206241+Roland Scheidegger2014-04-161-11/+20
| | | | | | | Just adjust to the ever-changing API, pass in MCContext when creating the MCDisassembler. Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: share some of gfx flush codeMarek Olšák2014-04-164-82/+55
| | | | Reviewed-by: Christian König <[email protected]>
* r600g,radeonsi: share r600_flush_from_stMarek Olšák2014-04-163-34/+17
| | | | Reviewed-by: Christian König <[email protected]>
* r600g: merge r600_flush with r600_context_flushMarek Olšák2014-04-163-45/+33
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: merge si_flush with si_context_flushMarek Olšák2014-04-164-38/+33
| | | | | | This also removes si_flush_gfx_ring. Reviewed-by: Christian König <[email protected]>
* gallium/radeon: create and return a fence in the flush functionMarek Olšák2014-04-1620-85/+99
| | | | | | All flush functions get a fence parameter. cs_create_fence is removed. Reviewed-by: Christian König <[email protected]>
* r600g: remove redundant r600_flush_dma_from_winsysMarek Olšák2014-04-161-8/+1
| | | | Reviewed-by: Christian König <[email protected]>
* winsys/radeon: fold cs_set_flush_callback into cs_createMarek Olšák2014-04-168-42/+26
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: cleanup redundant computation of flush flags and rename a functionMarek Olšák2014-04-161-8/+9
| | | | Reviewed-by: Christian König <[email protected]>
* r600g: remove redundant r600_flush_from_winsysMarek Olšák2014-04-161-8/+1
| | | | Reviewed-by: Christian König <[email protected]>
* winsys/radeon: remove cs_write_reloc, add simpler cs_get_relocMarek Olšák2014-04-164-29/+23
| | | | | | | The only difference is that it doesn't write to the CS and only returns the index. Reviewed-by: Christian König <[email protected]>
* winsys/radeon: consolidate hash table lookupMarek Olšák2014-04-162-68/+49
| | | | | | I should have done this long ago. Reviewed-by: Christian König <[email protected]>
* util/u_debug: Add noreturn attribute to _debug_assert_fail().José Fonseca2014-04-161-1/+5
| | | | | | | As recommended by http://clang-analyzer.llvm.org/annotations.html#attr_noreturn Reviewed-by: Brian Paul <[email protected]>
* r600g/radeonsi: Map transfer staging texture unsynchronized when possibleMichel Dänzer2014-04-161-0/+2
| | | | | | | | | The transfer staging texture is always freshly allocated, so for write-only transfers we don't need to explicitly wait for the BO to become idle. Squeezes a few hundered MB/s more out of x11perf -shmput500 with glamor. Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeonsi: Use caching buffer manager for textures as wellMichel Dänzer2014-04-151-1/+1
| | | | | | | Significantly reduces BO allocation / destruction overhead for transfers, e.g. measurable via x11perf -shm{ge,pu}t* with glamor. Reviewed-by: Marek Olšák <[email protected]>
* ilo: remove GPE state size estimationChia-I Wu2014-04-147-326/+97
| | | | Use size defines from genhw.
* ilo: remove GPE command size estimationChia-I Wu2014-04-146-403/+87
| | | | Use size defines from genhw.
* ilo: remove unused headersChia-I Wu2014-04-143-566/+0
| | | | | Remove intel_*.h. brw_*.h is still needed by the state dumper and disassembler.
* ilo: use only defines from genhw headersChia-I Wu2014-04-147-106/+87
| | | | Stop including classic driver headers in genhw.h, with some formatting fixes.
* ilo: scripted conversion to genhw headersChia-I Wu2014-04-1425-1626/+1626
| | | | Hopefully my four hundred line sed script is correct.
* ilo: add genhw headersChia-I Wu2014-04-1422-131/+3504
| | | | | All except genhw.h are generated by https://github.com/olvaffe/envytools/. intel_chipset.h is deprecated.
* ilo: avoid brw_wm_barycentric_interp_mode in compilerChia-I Wu2014-04-141-17/+46
| | | | In preparation for genhw.
* ilo: add TOY_OPCODE_DOChia-I Wu2014-04-146-7/+10
| | | | | We used to give BRW_OPCODE_DO a special meaning, while we should have used TOY_OPCODE_DO.
* egl-static: fix build after recent radeon winsys changesSimone Scanzoni2014-04-131-0/+4
| | | | Signed-off-by: Marek Olšák <[email protected]>