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* nouveau: codegen: LOAD: Take src swizzle into accountHans de Goede2016-04-272-2/+9
| | | | | | | | | | | | | | | | | | | | | | The llvm TGSI backend uses pointers in registers and does things like: LOAD TEMP[0].y, MEMORY[0], TEMP[0] Expecting the data at address TEMP[0].x to get loaded to TEMP[0].y. But this will cause the data at TEMP[0].x + 4 to be loaded instead. This commit adds support for a swizzle suffix for the 1st source operand, which allows using: LOAD TEMP[0].y, MEMORY[0].xxxx, TEMP[0] And actually getting the desired behavior Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: codegen: LOAD: Do not call fetchSrc(1) if the address is immediateHans de Goede2016-04-271-2/+3
| | | | | | | | | | "off" later gets set to NULL when the address is immediate, so move the fetchSrc(1) call to the non-immediate branch of the if-else. This brings handleLOAD's offset handling inline with how it is done in handleSTORE. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: codegen: LOAD: Always use component 0 when getting the addressHans de Goede2016-04-271-1/+3
| | | | | | | | | | LOAD loads upto 4 components from the specified resource starting at the passed in x value of the 2nd source operand, the y, z and w components of the address should not be used. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* r600g: fix and optimize tgsi_cmp when using ABS and NEG modifierPatrick Rudolph2016-04-271-1/+10
| | | | | | | | | | | | | | Some apps set NEG and ABS on the source param to test for zero. Use ALU_OP3_CNDE insted of ALU_OP3_CNDGE and unset both modifiers. It also removes the need for a MOV instruction, as ABS isn't supported on op3. Tested on AMD CAYMAN and AMD RV770. Signed-off-by: Patrick Rudolph <[email protected]> Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add support for compute shaders. (v2)Dave Airlie2016-04-278-3/+369
| | | | | | | | | | | | | | | | | This enables ARB_compute_shader on softpipe. I've only tested this with piglit so far, and I hopefully plan on integrating it with my vulkan work. I'll get to testing it with deqp more later. The basic premise is to create up to 1024 restartable TGSI machines, and execute workgroups of those machines. v1.1: free machines. v2: deqp fixes - add samplers support, finish atomic operations, fix load/store writemasks. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: initialise SysSemanticToIndex array to -1Dave Airlie2016-04-271-0/+3
| | | | | | | | We want to use the SysSemanticToIndex to tell if we've seen the semantics at all. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: implement restartable machine.Dave Airlie2016-04-272-17/+35
| | | | | | | | | | | | | | This lets us restart the machine at a PC value, and exits the machine when we hit a barrier. Compute shaders will then execute all the threads up to the barrier, then restart the machines after the barrier once all are done. v2: comment the code a bit, change return types. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: make inputs/outputs optional for compute shaders.Dave Airlie2016-04-271-19/+24
| | | | | | | | compute shaders don't need input/outputs so don't bother allocating memory for these. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: implement load/store/atomic on MEMORY.Dave Airlie2016-04-272-3/+150
| | | | | | | | This implements basic load/store/atomic ops on MEMORY types for compute shaders. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: split out setting up masks to separate functionDave Airlie2016-04-271-9/+14
| | | | | | | | This is just a cleanup that will make later changes easier to make. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: accept a starting PC value for exec machine.Dave Airlie2016-04-275-5/+5
| | | | | | | | This will be used later to restart barriered execution threads in compute, for now we just want to change the API. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: move to using vector for system values.Dave Airlie2016-04-274-7/+7
| | | | | | | | | | For compute support some of the system values are .xyz types, so move to using a vector instead of a single channel. [airlied: squash swizzle fix from compute series]. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: fix system value handling.Dave Airlie2016-04-271-3/+5
| | | | | | | | | | | a) SysSemanticToIndex needs to be indexed with the semantic name not the decl->Declaration.Semantic. b) doing this in run is too late, as the mappings are all setup prior to run in the execs. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* swr: autogenerate swr_context_llvm.hTim Rowley2016-04-266-128/+16
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: Remove every double semi-colonJakob Sinclair2016-04-2610-15/+15
| | | | | | Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* gallium/r600: removing double semi-colonsJakob Sinclair2016-04-261-1/+1
| | | | | | | | | | Trivial change. Removing unnecessary semi-colons from the code. I don't have push access so someone reviewing this can push it. Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* radeonsi: add RW_BUFFERS only once in si_ce_needed_cs_spaceMarek Olšák2016-04-261-2/+2
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nvc0: expose GLSL version 420 on GK110Samuel Pitoiset2016-04-261-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: enable ARB_shader_image_load_store on GK110Samuel Pitoiset2016-04-261-1/+1
| | | | | | | This exposes 8 images for all shader types. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for VSHLSamuel Pitoiset2016-04-261-0/+58
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_SUEAU, OP_SUBFM and OP_SUCLAMPSamuel Pitoiset2016-04-261-0/+87
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_SULDB and OP_SUSTxSamuel Pitoiset2016-04-261-0/+155
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_MADSPSamuel Pitoiset2016-04-261-0/+23
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for OP_PERMTSamuel Pitoiset2016-04-261-0/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: expose GLSL version 420 on GK104Samuel Pitoiset2016-04-261-0/+2
| | | | | | | Other chipsets will be added later. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: enable ARB_shader_image_load_store on GK104Ilia Mirkin2016-04-261-0/+2
| | | | | | | This exposes 8 images for all shader types. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: inform users that 3D images are not fully supportedSamuel Pitoiset2016-04-263-5/+10
| | | | | | | | | 3D images are a bit more complicated to implement and will probably requires a bunch of headaches and we don't care for now because they do not seem to be really used by apps. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: reduce GL_MAX_3D_TEXTURE_SIZE to 2048 on Kepler+Samuel Pitoiset2016-04-261-1/+1
| | | | | | | | | The blob sets it to 2048 and using 4096 reports an INVALID_DATA error with RT_ARRAY_MODE when z is 4096. Suggested by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nvc0/ir: check that the image format doesn't mismatchSamuel Pitoiset2016-04-263-2/+25
| | | | | | | | | | This re-uses NVE4_SU_INFO_CALL which is not used anymore because we don't use our lib for format conversions. While we are at it, add a todo for image buffers because there are some robustness-related issues to fix. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: prevent out of bounds when no images are boundSamuel Pitoiset2016-04-261-2/+19
| | | | | | | | | | Checking if the image address is not 0 should be enough to prevent read faults. To improve robustness, make sure that the destination value of atomic operations is correctly initialized in case the instruction is not performed. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add indirect support for images on KeplerSamuel Pitoiset2016-04-261-12/+28
| | | | | | | | This fixes arb_shader_image_load_store-indexing and arb_shader_image_load_store-max-images. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: fix 1D arrays images for KeplerSamuel Pitoiset2016-04-261-2/+9
| | | | | | | For 1D arrays, the array index is stored in the Z component. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: fix cube images for KeplerSamuel Pitoiset2016-04-261-5/+5
| | | | | | | Like 2d array images, the z-dimension needs to be clamped. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: add support for SULDP -> SULDB conversionIlia Mirkin2016-04-265-45/+293
| | | | | | | | | | This will allow to convert surface formats without adding an extra call to our lib. [hakzsam: make use of this for GK104] Signed-off-by: Samuel Pitoiset <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: make use of OP_SUQ for surfaces querySamuel Pitoiset2016-04-264-11/+71
| | | | | | | | | This implements RESQ for surfaces which comes from imageSize() GLSL bultin. As the dimensions are sticked into the driver constant buffer, this only has to be lowered with loads. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> (v2)
* nv50/ir: add OP_BUFQ for buffers querySamuel Pitoiset2016-04-266-7/+23
| | | | | | | | | | TGSI RESQ allows both images and buffers but we have to make a distinction between these two type of resources in our lowering pass. Introducing OP_BUFQ which is a fake operand will allow to implement OP_SUQ for surfaces. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: enable early fragment test with explicit user controlSamuel Pitoiset2016-04-261-0/+3
| | | | | | | | | | | | | | This feature can be enabled in two ways: as an optimization and by explicit user control (with OpenGL 4.2 or ARB_shader_image_load_store). This makes use of the recent TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL to force early fragment tests when needed. This fixes a bunch of dEQP-GLES31.functional.image_load_store.early_fragment_tests.* tests. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: fix constraints for OP_SUSTx on KeplerSamuel Pitoiset2016-04-261-1/+3
| | | | | | | | Destination type is actually always 32-bits, so typeSizeof() returns 4 and no sources are condensed. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: re-introduce TGSI lowering pass for imagesSamuel Pitoiset2016-04-261-3/+94
| | | | | | | | This is loosely based on the previous lowering pass wrote by calim four years ago. I did clean the code and fixed some issues. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: add support for TGSI image declarationsSamuel Pitoiset2016-04-261-1/+22
| | | | | | | | Old and dead resource code will be removed once images are completely done. Based on original patch by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: add missing glMemoryBarrier bitsSamuel Pitoiset2016-04-261-1/+8
| | | | | | | | This fixes a bunch of subtests of arb_shader_image_load_store-host-mem-barrier. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> (v1)
* nvc0: enable RGB10_A2UI format on GK104Samuel Pitoiset2016-04-261-3/+3
| | | | | | | | | No clue why this was not enabled by default before, maybe because the SULDP conversion was wrong. Anyway, this helps in fixing all rgb10_a2ui piglit tests. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: shift address with blocksize for image buffersSamuel Pitoiset2016-04-261-0/+4
| | | | | | | This fixes a bunch of dEQP image buffers related tests. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: fix address offset when images have multiple levelsSamuel Pitoiset2016-04-261-0/+1
| | | | | | | This fixes arb_shader_image_load_store-level. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: bind images on 3D shaders for KeplerSamuel Pitoiset2016-04-262-2/+31
| | | | | | | Similar to surfaces validation for compute shaders. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: bind images on compute shaders for KeplerSamuel Pitoiset2016-04-264-28/+110
| | | | | | | | | | | Old surfaces validation code will be removed once images are completely done for Fermi/Kepler, that explains why I only disable it for now. This also introduces nvc0_get_surface_dims() which computes correct dimensions regarding the given target. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: reserve an area for surfaces info in the driver constbufSamuel Pitoiset2016-04-266-12/+12
| | | | | | | | | | | | | To process surfaces coordinates from the codegen part, and because some information like the format is not always available (eg. when writeonly is used), we have to stick some surfaces data in the driver constbuf. This is especially true for OpenCL because we don't know the format at shader compile time. This bumps the size of each shader area from 1K to 2K. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: add preliminary support for imagesSamuel Pitoiset2016-04-265-2/+74
| | | | | | | | | | | | This implements set_shader_images() and resource invalidation for images. As OpenGL requires at least 8 images, we are going to expose this minimum value even if this might be raised for Kepler, but this limit is mainly for Fermi because the hardware only accepts 8 images. Based on original patch by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for (a OP b) OP cSamuel Pitoiset2016-04-261-0/+26
| | | | | | | | This is pretty similar to NVC0 except that offsets have changed. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nvc0/ir: fix wrong emission of (a OP b) OP cSamuel Pitoiset2016-04-261-2/+2
| | | | | | | | | | | The third source must be emitted at offset 49 instead of 17 and the not modifier is at 52 instead of 20. If you look a bit above in emitLogicOp() you will see that the dest is emitted at 17 which confirms that src(2) is obviously wrong. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
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