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* swr: [rasterizer archrast] fix double free issueTim Rowley2016-11-149-24/+41
* swr: [rasterizer core] separate frontend/backend stats enablesTim Rowley2016-11-146-26/+51
* swr: [rasterizer core] 16-wide tile store nearly completedTim Rowley2016-11-145-314/+917
* vc4: Add simulator kernel validation for multithreaded fragment shaders.Jonas Pfeil2016-11-123-5/+76
* vc4: Mark threaded FSes as non-singlethread in the CL.Eric Anholt2016-11-123-1/+6
* vc4: Flag the last thread switch in the program as the last.Eric Anholt2016-11-123-0/+34
* vc4: Add THRSW nodes after each tex sample setup in multithreaded mode.Eric Anholt2016-11-122-0/+49
* vc4: Add some spec citations about texture fifo management.Eric Anholt2016-11-121-5/+37
* vc4: Use ra14/rb14 as the spilling registers.Eric Anholt2016-11-122-8/+8
* vc4: Add support for register allocation for threaded shaders.Eric Anholt2016-11-123-20/+85
* vc4: Split register class setup for physical files from accumulators.Eric Anholt2016-11-121-17/+19
* vc4: Use register allocator CLASS_BIT_R0_R3 to clean up CLASS_B.Eric Anholt2016-11-121-4/+4
* vc4: Add support for QPU scheduling of thread switch instructions.Eric Anholt2016-11-121-2/+27
* vc4: Add a thread switch QIR instruction.Eric Anholt2016-11-123-0/+18
* vc4: Add a bit of QPU validation for threaded shaders.Eric Anholt2016-11-121-1/+102
* vc4: Fix register class handling of DDX/DDY arguments.Eric Anholt2016-11-121-1/+1
* freedreno/ir3: fixup ralloc falloutRob Clark2016-11-122-2/+2
* clover: fix building since llvm r286566Laurent Carlier2016-11-111-0/+5
* nvc0: support MP performance counters on MaxwellSamuel Pitoiset2016-11-103-3/+721
* gallium: detect avx512 cpu featuresTim Rowley2016-11-102-0/+36
* radeonsi: fix r600_texture::tc_compatible_htileMarek Olšák2016-11-101-3/+3
* radeonsi: accept is_store in image_fetch_rsrc instead of dcc_offMarek Olšák2016-11-101-4/+4
* radeonsi: don't rely on tgsi_scan::images_buffersMarek Olšák2016-11-101-8/+11
* radeonsi: re-order cases in si_get_shader_paramMarek Olšák2016-11-101-28/+28
* radeonsi: increase MAX_CONTROL_FLOW_DEPTH AKA MaxIfDepthMarek Olšák2016-11-101-2/+1
* radeonsi: fix/silence unused variable warnings in optimized buildsNicolai Hähnle2016-11-102-3/+3
* gallivm: fix [IU]MUL_HI regression harderNicolai Hähnle2016-11-101-8/+12
* swr: correct setting of independentAlphaBlendEnableIlia Mirkin2016-11-091-1/+6
* swr: [rasterizer] add a .dir-locals.el to support 4-space indentsIlia Mirkin2016-11-091-0/+8
* swr: set halfz rasterizer settingIlia Mirkin2016-11-091-0/+1
* swr: [rasterizer core] allow an OpenGL driver to specify halfz clippingIlia Mirkin2016-11-092-7/+7
* swr: fix support for inverted depth scalesIlia Mirkin2016-11-091-7/+3
* swr: [rasterizer jitter] fix logic op to work with unorm/snormIlia Mirkin2016-11-091-17/+65
* vc4: Clamp the shadow comparison value.Eric Anholt2016-11-091-0/+9
* vc4: Don't pair up TLB scoreboard locking instructions early in QPU sched.Eric Anholt2016-11-091-0/+12
* vc4: Print a reg pressure estimate in our reg allocation failure dump.Eric Anholt2016-11-091-0/+5
* vc4: Don't abort when a shader compile fails.Eric Anholt2016-11-096-8/+32
* llvmpipe: Fix build after removal of deprecated attribute API v2Aaron Watry2016-11-092-3/+2
* gallivm: Fix build after removal of deprecated attribute API v3Tom Stellard2016-11-096-52/+138
* Revert "draw: use vectorized calculations for fetch"Roland Scheidegger2016-11-092-282/+159
* swr: disable logic op when the rt format is float or srgbIlia Mirkin2016-11-081-0/+6
* swr: fix AND_INVERTED logic op conversionIlia Mirkin2016-11-081-1/+1
* swr: add support for EXT_depth_bounds_testIlia Mirkin2016-11-082-1/+7
* swr: [rasterizer core] set depth hottile when depth bounds test enabledIlia Mirkin2016-11-081-1/+3
* swr: allow alphatest without blend or logicopTim Rowley2016-11-081-1/+2
* tgsi/scan: turn a huge if-else-if.. chain into a switch statementMarek Olšák2016-11-081-14/+30
* tgsi/scan: fix images_buffers regressionMarek Olšák2016-11-081-3/+2
* gallivm: fix [IU]MUL_HI regressionNicolai Hähnle2016-11-083-28/+90
* draw: use vectorized calculations for fetchRoland Scheidegger2016-11-082-159/+282
* gallivm: introduce 32x32->64bit lp_build_mul_32_lohi functionRoland Scheidegger2016-11-083-38/+172
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