| Commit message (Expand) | Author | Age | Files | Lines |
* | android: radeonsi: fix sid_tables.h missing LOCAL_MODULE_CLASS | Mauro Rossi | 2015-09-24 | 1 | -0/+1 |
* | gallium/radeon: remove the percentage symbol from HUD temperature | Benjamin Bellec | 2015-09-24 | 1 | -1/+1 |
* | gallium/u_blitter: handle allocation failures | Marek Olšák | 2015-09-24 | 1 | -0/+6 |
* | radeonsi: handle dummy constant buffer allocation failure | Marek Olšák | 2015-09-24 | 1 | -0/+2 |
* | radeonsi: don't forget to update scratch relocations for LS, HS, ES shaders | Marek Olšák | 2015-09-24 | 1 | -2/+6 |
* | radeonsi: skip drawing if updating the scratch buffer fails | Marek Olšák | 2015-09-24 | 1 | -14/+49 |
* | radeonsi: skip drawing if PS fails to compile or upload | Marek Olšák | 2015-09-24 | 1 | -12/+3 |
* | radeonsi: skip drawing if VS, TCS, TES, GS fail to compile or upload | Marek Olšák | 2015-09-24 | 1 | -7/+23 |
* | radeonsi: handle fixed-func TCS shader create failure | Marek Olšák | 2015-09-24 | 1 | -2/+5 |
* | radeonsi: handle shader precompile failures | Marek Olšák | 2015-09-24 | 1 | -1/+6 |
* | radeonsi: skip drawing if GS ring allocations fail | Marek Olšák | 2015-09-24 | 1 | -1/+10 |
* | radeonsi: skip drawing if the tess factor ring allocation fails | Marek Olšák | 2015-09-24 | 3 | -5/+12 |
* | radeonsi: add malloc fail paths to si_create_shader_state | Marek Olšák | 2015-09-24 | 1 | -0/+8 |
* | radeonsi: report alloc failure from si_shader_binary_read | Marek Olšák | 2015-09-24 | 1 | -1/+4 |
* | gallium/radeon: add a fail path for depth MSAA texture readback | Marek Olšák | 2015-09-24 | 1 | -0/+5 |
* | gallium/radeon: handle buffer alloc failures in r600_draw_rectangle | Marek Olšák | 2015-09-24 | 1 | -0/+3 |
* | gallium/radeon: handle buffer_map staging buffer failures better | Marek Olšák | 2015-09-24 | 1 | -4/+3 |
* | radeonsi: handle constant buffer alloc failures | Marek Olšák | 2015-09-24 | 1 | -1/+7 |
* | radeonsi: handle index buffer alloc failures | Marek Olšák | 2015-09-24 | 1 | -0/+6 |
* | st/xa: Fixups for PIPE_FORMAT_R8_UNORM A8 usage v2. | Thomas Hellstrom | 2015-09-24 | 2 | -11/+29 |
* | r600g: update num_dw in scissor_enable workaround | Grazvydas Ignotas | 2015-09-23 | 1 | -0/+1 |
* | radeonsi: implement TXQS support | Ilia Mirkin | 2015-09-21 | 2 | -25/+69 |
* | radeonsi: load fmask ptr relative to the resources array | Ilia Mirkin | 2015-09-21 | 1 | -1/+1 |
* | freedreno/ir3: use nir two-sided-color lowering | Rob Clark | 2015-09-18 | 1 | -21/+3 |
* | freedreno/ir3: lower txp/clamp in NIR | Rob Clark | 2015-09-18 | 1 | -26/+30 |
* | freedreno/ir3: add --gpu arg to cmdline compiler | Rob Clark | 2015-09-17 | 1 | -1/+10 |
* | freedreno/a4xx: wire up ucp support | Rob Clark | 2015-09-17 | 1 | -0/+1 |
* | freedreno/ir3: add support for ucp | Rob Clark | 2015-09-17 | 4 | -13/+80 |
* | freedreno/ir3: convert from tgsi semantic/index to varying-slot | Rob Clark | 2015-09-17 | 7 | -193/+234 |
* | freedreno/ir3: switch to shader_enums.h interp constants | Rob Clark | 2015-09-17 | 4 | -41/+20 |
* | nv50,nvc0: flush texture cache in presence of coherent bufs | Ilia Mirkin | 2015-09-17 | 2 | -0/+39 |
* | nv50,nvc0: detect underlying resource changes and update tic | Ilia Mirkin | 2015-09-17 | 2 | -0/+43 |
* | vc4: Try to pair up instructions when only one of them has PM bit | Boyan Ding | 2015-09-17 | 1 | -47/+76 |
* | st/xa: Use PIPE_FORMAT_R8_UNORM when available | Thomas Hellstrom | 2015-09-17 | 2 | -34/+34 |
* | freedreno/a3xx: use NUM_USER_CLIP_PLANES helper instead of magic number | Ilia Mirkin | 2015-09-16 | 1 | -1/+2 |
* | freedreno/a3xx: fix blending of L8 format | Ilia Mirkin | 2015-09-16 | 1 | -0/+2 |
* | freedreno/a3xx: add support for dual-source blending | Ilia Mirkin | 2015-09-16 | 7 | -6/+32 |
* | vc4: convert from tgsi semantic/index to varying-slot | Eric Anholt | 2015-09-16 | 7 | -147/+106 |
* | gallium/ttn: Convert to using VARYING_SLOT_* / FRAG_RESULT_*. | Eric Anholt | 2015-09-16 | 6 | -47/+239 |
* | nv50, nvc0: fix max texture buffer size to 128M elements | Ilia Mirkin | 2015-09-16 | 2 | -2/+2 |
* | freedreno: one screen to rule them all | Rob Clark | 2015-09-16 | 4 | -4/+125 |
* | freedreno/ir3: use NIR to lower ffract instead of tgsi_lowering | Rob Clark | 2015-09-16 | 1 | -1/+1 |
* | freedreno/a4xx: more texture formats | Rob Clark | 2015-09-15 | 1 | -7/+8 |
* | freedreno/a4xx: border-color support | Rob Clark | 2015-09-15 | 4 | -2/+31 |
* | freedreno/a4xx: wire up texture clamp lowering | Rob Clark | 2015-09-15 | 2 | -20/+80 |
* | freedreno: helper for a3xx/a4xx border-colors | Rob Clark | 2015-09-15 | 4 | -67/+99 |
* | freedreno: update generated headers | Rob Clark | 2015-09-15 | 5 | -17/+37 |
* | gallium/svga: Enable PIPE_FORMAT_L8_UNORM for vgpu10 | Thomas Hellstrom | 2015-09-15 | 1 | -1/+1 |
* | nvc0/ir: start offset at texBindBase for txq, like regular texturing | Ilia Mirkin | 2015-09-14 | 1 | -1/+4 |
* | vc4: Fix build from recent NIR cleanups. | Eric Anholt | 2015-09-14 | 1 | -2/+1 |