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* gallium: Add integer 64 capabilityDave Airlie2017-01-2717-0/+17
* clover: Fix build against clang SVN >= r293097Michel Dänzer2017-01-271-1/+8
* vc4: Use NEON to speed up utile stores on Pi2+.cros-mesa-17.1.0-r2-vanillacros-mesa-17.1.0-r1-vanillachadv/cros-mesa-17.1.0-r2-vanillachadv/cros-mesa-17.1.0-r1-vanillaEric Anholt2017-01-261-5/+50
* vc4: Use NEON to speed up utile loads on Pi2.Eric Anholt2017-01-263-18/+115
* vc4: Move LT tiling code to a separate file.Eric Anholt2017-01-264-80/+122
* vc4: Use unreachable() in an unreachable codepath for tiling.Eric Anholt2017-01-261-4/+2
* gallium/radeon: add VRAM-vis-usage HUD querySamuel Pitoiset2017-01-265-0/+14
* gallium/radeon: query the CPU accessible size of VRAMSamuel Pitoiset2017-01-264-1/+13
* swr: Update fs texture & sampler state logicGeorge Kyriazis2017-01-251-2/+5
* gallium/radeon: add a new HUD query for the number of mapped buffersSamuel Pitoiset2017-01-259-0/+18
* radeonsi: handle first_non_void correctly in si_create_vertex_elementsMarek Olšák2017-01-241-3/+3
* gallivm: don't try to use fast rcp for fdivRoland Scheidegger2017-01-241-1/+3
* gallivm: (trivial) fix ddiv cpu implementationRoland Scheidegger2017-01-241-1/+0
* tgsi: implement ddiv opcodeRoland Scheidegger2017-01-241-0/+14
* gallium/radeon: undef the very specific UPDATE_COUNTER macroSamuel Pitoiset2017-01-241-5/+9
* nv50: add support for MUL_ZERO_WINS propertyIlia Mirkin2017-01-235-2/+11
* nvc0: add support for MUL_ZERO_WINS propertyIlia Mirkin2017-01-234-9/+25
* st/nine: set the MUL_ZERO_WINS flag when supportedIlia Mirkin2017-01-231-0/+3
* gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINSIlia Mirkin2017-01-2318-0/+19
* gallium: add TGSI_PROPERTY_MUL_ZERO_WINSIlia Mirkin2017-01-233-3/+18
* radeonsi: always set the TCL1_ACTION_ENA when invalidating L2Marek Olšák2017-01-231-1/+2
* radeonsi: don't declare LDS in TESMarek Olšák2017-01-231-2/+1
* radeonsi: preload PS inputs only if KILL is usedMarek Olšák2017-01-231-2/+6
* gallium/radeon: adjust the rule for using the LINEAR_ALIGNED layoutMarek Olšák2017-01-231-1/+3
* winsys/amdgpu: drop all IBs if at least one was rejected within the contextMarek Olšák2017-01-231-1/+7
* winsys/amdgpu: report a rejected IB as a lost contextMarek Olšák2017-01-233-0/+14
* gallium/radeon: add HUD queries for monitoring some hw blocksSamuel Pitoiset2017-01-234-1/+110
* gallium/radeon: refactor the GRBM counters pathSamuel Pitoiset2017-01-233-43/+47
* swr: Align query results allocationGeorge Kyriazis2017-01-232-4/+5
* swr: Prune empty nodes in CalculateProcessorTopology.Bruce Cherniak2017-01-231-0/+9
* st/va: make sure that we call begin_frame() only once v2Christian König2017-01-232-3/+9
* r600: implement DDIVNicolai Hähnle2017-01-231-0/+59
* r600: factor out cayman_emit_unary_double_rawNicolai Hähnle2017-01-231-20/+42
* r600: double multiply can handle only one multiply at a timeNicolai Hähnle2017-01-231-17/+19
* freedreno/a5xx: set frag shader threadsizeRob Clark2017-01-221-2/+7
* freedreno/a5xx: set fragcoordxy properlyRob Clark2017-01-221-1/+1
* freedreno/ir3: setup var locations in standalone compilerRob Clark2017-01-221-1/+69
* freedreno/a5xx: fix psizeRob Clark2017-01-222-8/+5
* freedreno/a5xx: srgb fixRob Clark2017-01-221-1/+2
* freedreno/a5xx: fix int vbosRob Clark2017-01-221-1/+3
* freedreno/a5xx: fix clear for uint/sint formatsRob Clark2017-01-221-19/+28
* freedreno/a5xx: fix cull stateRob Clark2017-01-221-5/+5
* freedreno: update generated headersRob Clark2017-01-226-13/+36
* Revert "radeonsi: reject invalid vertex element formats"Marek Olšák2017-01-201-5/+0
* gallium: add pipe_screen::resource_changed callback wrappersPhilipp Zabel2017-01-203-0/+47
* etnaviv: implement resource_changed to invalidate internal resources derived ...Philipp Zabel2017-01-201-0/+13
* etnaviv: initialize seqno of imported resourcesPhilipp Zabel2017-01-201-0/+2
* st/dri: ask the driver to update its internal copies on reimportPhilipp Zabel2017-01-201-0/+4
* gallium: add pipe_screen::resource_changedPhilipp Zabel2017-01-202-0/+22
* gallium/hud: add missing break in hud_cpufreq_graph_install()Samuel Pitoiset2017-01-201-0/+1
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