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* freedreno/gmem: fix hw binning hangs with large render targetsRob Clark2017-05-163-3/+13
| | | | | | | | On all 3 gens, we have 4 bits for width and height in the VSC pipe config. And overflow results in setting width and/or height to zero which causes hangs. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix crash with atomicsRob Clark2017-05-161-2/+9
| | | | | | Atomics can have a result value. And sometimes it is even used. Signed-off-by: Rob Clark <[email protected]>
* ttn: fix dest size for some texture instructionsRob Clark2017-05-161-1/+3
| | | | | | | Some, like lod, don't return 4 components. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* ttn: fix txd src sizesRob Clark2017-05-161-4/+6
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* ttn: fix txs dest sizeRob Clark2017-05-161-1/+2
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/a5xx: remove unneeded assertRob Clark2017-05-161-3/+0
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fallback to slow-clear for z32Rob Clark2017-05-164-11/+36
| | | | | | | We probably *could* do this with blit path, but I think it would involve clobbering settings from batch->gmem (see emit_zs()). Signed-off-by: Rob Clark <[email protected]>
* etnaviv: increment the resource seqno in resource_changedPhilipp Zabel2017-05-161-5/+1
| | | | | | | | | | Just increment the resource seqno instead of setting the texture seqno to be lower by one than the resource seqno. Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Lucas Stach <[email protected]> Reviewed-By: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: clean up sampler view reference countingLucas Stach2017-05-161-3/+3
| | | | | | | | Use the proper pipe_resource_reference function instead of rolling our own. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: apply feature overrides in one central locationLucas Stach2017-05-165-10/+19
| | | | | | | | | This way we can just test the feature bits and don't need to spread the debug overrides to all locations touching a feature. Signed-off-by: Lucas Stach <[email protected]> Reviewed-By: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: allow R/B swapped surfaces to be clearedLucas Stach2017-05-161-0/+2
| | | | | | | Fixes: 7f62ffb68ad ("etnaviv: add support for rb swap") Cc: [email protected] Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: stop oversizing buffer resourcesLucas Stach2017-05-161-1/+1
| | | | | | | | | | | | | | PIPE_BUFFER is a target enum, not a binding. This caused the driver to up-align the height of buffer resources, leading to largely oversizing those resources. This is especially bad, as the buffer resources used by the upload manager are already 1MB in size. Height alignment meant that those would result in 4 to 8MB big BOs. Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs") Cc: [email protected] Signed-off-by: Lucas Stach <[email protected]> Reviewed-By: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* radeonsi: extract TGSI memory/texture opcode handling into its own fileNicolai Hähnle2017-05-165-1841/+1886
| | | | | | It's about time to get the growth of si_shader.c somewhat under control. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: make const_array externally accessibleNicolai Hähnle2017-05-162-13/+15
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: make get_bounded_indirect_index externally accessibleNicolai Hähnle2017-05-162-16/+20
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: make emit_waitcnt externally accessibleNicolai Hähnle2017-05-162-10/+12
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: silence a Coverity warningNicolai Hähnle2017-05-161-0/+2
| | | | | | | | | | | | Coverity doesn't understand that we'll never pass non-NULL for vertex shaders. This is a bit lame, actually. A straightforward cross-procedural analysis limited to this source file should be enough to prove that there's no NULL-pointer dereference. Oh well. CID: 1405999 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: rename tcs_tes_uses_prim_id for clarityNicolai Hähnle2017-05-163-9/+9
| | | | | | | | What we care about is whether PrimID is used while tessellation is enabled; whether it's used in TCS/TES or further down the pipeline is irrelevant. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix gl_PrimitiveIDIn in geometry shader when using tessellationNicolai Hähnle2017-05-161-0/+2
| | | | | | | | | | | This builds on commit 0549ea15ec38 ("radeonsi: fix primitive ID in fragment shader when using tessellation"). Fixes piglit arb_tessellation_shader/execution/gs-primitiveid-instanced.shader_test Cc: 17.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable threaded_contextMarek Olšák2017-05-151-3/+34
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/u_threaded: drop and ignore all non-async debug callbacksMarek Olšák2017-05-152-3/+8
| | | | | | This is necessary to comply with OpenGL. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add threaded context counter monitoring for HUDMarek Olšák2017-05-153-0/+25
| | | | | | | | | "tc" will be initialized by the next commit. v2: rename stuff according to v2 changes in u_threaded_context Reviewed-by: Nicolai Hähnle <[email protected]> (v1) Tested-by: Dieter Nützel <[email protected]>
* radeonsi: implement replace_buffer_storage for the threaded contextMarek Olšák2017-05-153-13/+55
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: subclass and handle threaded_queryMarek Olšák2017-05-152-7/+12
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: subclass threaded_transferMarek Olšák2017-05-153-25/+25
| | | | | | | v2: use assert on rtransfer->b.staging Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: subclass threaded_resourceMarek Olšák2017-05-153-18/+22
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: handle other map buffer flags from the threaded contextMarek Olšák2017-05-151-2/+4
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: handle TC_TRANSFER_MAP_THREADED_UNSYNCMarek Olšák2017-05-153-1/+14
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: unwrap a context if we get a wrapped oneMarek Olšák2017-05-153-5/+9
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: require both WRITE and FLUSH_EXPLICIT in buffer_flush_regionMarek Olšák2017-05-151-2/+4
| | | | | | | spotted randomly. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/util: add threaded_context as a pipe_context wrapperMarek Olšák2017-05-154-0/+2723
| | | | | | | | | | | | | | v2: - rename num_calls -> num_call_slots (for tc_call) - rename num_calls -> num_total_call_slots (for tc_batch) - rename num_offloaded/direct_calls -> num_offloaded/direct_slots - declare slot[0] instead of slot[1] - remove no-op leftover code from tc_draw_vbo - use tc_set_resource_reference to fill threaded_transfer - fix map flags for sparse buffers - cosmetic changes Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/u_upload: add u_upload_cloneMarek Olšák2017-05-152-0/+14
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium: add flag PIPE_CONTEXT_PREFER_THREADEDMarek Olšák2017-05-151-0/+8
| | | | | | | | State trackers can set this to tell the driver when u_threaded_context is desirable. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeonsi/gfx9: add support for RavenMarek Olšák2017-05-154-2/+14
| | | | | | Cc: 17.1 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* renderonly: Initialize fields of struct winsys_handle.Eric Anholt2017-05-151-0/+1
| | | | | | | | | | vc4 was rejecting renderonly's import, because the offset field was nonzero. Fixes: 848b49b288f ("gallium: add renderonly library") Cc: [email protected] Signed-off-by: Eric Anholt <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* Revert "freedreno: use bypass if only clears"Rob Clark2017-05-141-4/+1
| | | | | | | Causing issues with stk on a4xx.. still probably a good idea, but seems some debugging is needed first. This reverts commit 3ab072d3c8643c66d8e07e63df970b792728bac6.
* freedreno: fix crash when flush() but no renderingRob Clark2017-05-141-0/+6
| | | | | | | | | | If we haven't created a batch, just bail in pipe->flush(), since there is nothing to do. Fixes crash in warsow, which creates a whole bunch of contexts used for nothing but texture uploads. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix indexbuffer uploadRob Clark2017-05-146-15/+26
| | | | | | | | My fault for not having time to test Marek's patches while they were on list. Fixes: 330d0607 ("gallium: remove pipe_index_buffer and set_index_buffer") Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: hw binning supportRob Clark2017-05-139-51/+185
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-136-29/+297
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: use bypass if only clearsRob Clark2017-05-131-1/+4
| | | | | | | Some things trigger batches that only contain a clear (like glmark2 startup). No point to use GMEM for this. Signed-off-by: Rob Clark <[email protected]>
* nv50/ir: Report wrong prog types using proper varPierre Moreau2017-05-131-1/+1
| | | | | | | | | | | | Coverity caught the use of the uninitialised variable `type`. However, it was `info->type`, which is initialised, which was meant to be used. CID: 1406000 Reported-by: Ilia Mirkin <[email protected]> Fixes: b490ca9a387d ("nv50/ir: Fail if encountering unknown shader type") Signed-off-by: Pierre Moreau <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: get rid of secondary input/output wordNicolai Hähnle2017-05-123-47/+13
| | | | | | | By keeping track of fewer generics, everything can fit into 64 bits. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: reduce the number of generics for shader IO unique indicesNicolai Hähnle2017-05-121-1/+1
| | | | | | | | | | | | This is a high as possible while still allowing to merge the bitfields with the next commit. For OpenGL, 32 would be sufficient. Nine apparently uses (much!) higher indices than. Indices that are out of bound don't hurt for VS-PS pipelines, except that the VS output kill optimization is not applied. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: at most 8 sets of texture coordinates are supportedNicolai Hähnle2017-05-121-0/+1
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: skip generic out/in indices without a shader IO indexNicolai Hähnle2017-05-122-1/+9
| | | | | | | | | | | | | OpenGL uses at most 32 generic outputs/inputs in any stage, and they always have a shader IO index and therefore fit into the outputs_written/ inputs_read/kill_outputs fields. However, Nine uses semantic indices more liberally. We support that in VS-PS pipelines, except that the optimization of killing outputs must be skipped. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use SI_MAX_IO_GENERIC instead of magic valuesNicolai Hähnle2017-05-123-3/+8
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: Add defines for per-shader engine settingsGlenn Kennard2017-05-121-0/+6
| | | | | Acked-by: Dave Airlie <[email protected]> Signed-off-by: Glenn Kennard <[email protected]>
* r600g: Add instruction encoding defines for MEM_RDGlenn Kennard2017-05-121-0/+30
| | | | | Acked-by: Dave Airlie <[email protected]> Signed-off-by: Glenn Kennard <[email protected]>
* r600g: Add scratch ring register definesGlenn Kennard2017-05-122-2/+20
| | | | | Acked-by: Dave Airlie <[email protected]> Signed-off-by: Glenn Kennard <[email protected]>
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