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* nvc0/ir: make sure out-of-bounds buffer loads/atomics get a 0 resultIlia Mirkin2016-05-171-1/+26
* vl/dri: Move the DRI3 check out of sources include into C.Jose Fonseca2016-05-162-5/+5
* st/vdpau: add dri3 supportLeo Liu2016-05-161-1/+5
* vl/dri3: implement functions for get and set timestampLeo Liu2016-05-161-6/+53
* vl/dri3: handle PresentCompleteNotify eventLeo Liu2016-05-161-1/+27
* st/va: add dri3 supportLeo Liu2016-05-161-1/+5
* vl/dri3: implement DRI3 BufferFromPixmapLeo Liu2016-05-161-3/+113
* vl/dri3: add support for resizingLeo Liu2016-05-161-4/+13
* vl/dri3: implement funciton for get dirty areaLeo Liu2016-05-161-2/+9
* vl/dri3: implement function for flush frontbufferLeo Liu2016-05-161-2/+30
* vl/dri3: add back buffers supportLeo Liu2016-05-161-2/+185
* vl/dri3: implement flushing for queued eventsLeo Liu2016-05-161-0/+36
* vl/dri3: register present eventsLeo Liu2016-05-161-0/+27
* vl/dri3: set drawable geometryLeo Liu2016-05-161-0/+35
* vl/dri3: add DRI3 support and implement create and destroyLeo Liu2016-05-163-0/+208
* clover: grid_offset should be padded with 0 not 1Jan Vesely2016-05-161-1/+1
* clover: Handle PIPE_SHADER_IR_NIR in switchJan Vesely2016-05-151-1/+2
* freedreno/ir3: small standalone compiler cleanupRob Clark2016-05-151-2/+1
* freedreno/ir3: lower fdivRob Clark2016-05-151-0/+1
* freedreno/ir3: handle VARYING_SLOT_PNTCRob Clark2016-05-151-0/+12
* freedreno/ir3: disable TGSI specific hacks in nir caseRob Clark2016-05-154-2/+7
* freedreno/ir3: add support for NIR as preferred IRRob Clark2016-05-156-18/+61
* nv50/ir: avoid asserts when the state tracker feeds us bogus inputsIlia Mirkin2016-05-151-12/+48
* nvc0: don't try to go through the push path for indirect drawsIlia Mirkin2016-05-151-1/+2
* nvc0/ir: make sure to align the second arg of TXD to 4, as we do for TEXIlia Mirkin2016-05-151-0/+14
* nv50,nvc0: add support for cull distancesTobias Klausmann2016-05-1510-11/+33
* gallium: Add a pipe cap for arb_cull_distanceTobias Klausmann2016-05-1415-0/+16
* radeonsi/sid_tables: rename reg_table to sid_reg_tableNicolai Hähnle2016-05-132-3/+3
* radeonsi/sid_tables: store offset into global fields table instead of pointerNicolai Hähnle2016-05-132-9/+16
* radeonsi/sid_tables: store strings by offset instead of by pointerNicolai Hähnle2016-05-132-28/+141
* r600: remove TABLE_SIZE macroNicolai Hähnle2016-05-132-4/+2
* r600: move alu_op_table to .c fileNicolai Hähnle2016-05-133-277/+291
* r600: move cf_op_table to .c fileNicolai Hähnle2016-05-132-108/+111
* r600: move fetch_op_table to .c fileNicolai Hähnle2016-05-132-118/+121
* r600: protect r600_isa.h with extern "C"Nicolai Hähnle2016-05-131-0/+8
* gallium/ddebug: Implement launch_grid.Bas Nieuwenhuizen2016-05-131-0/+29
* gallium/ddebug: Support compute states.Bas Nieuwenhuizen2016-05-131-16/+40
* gallium/ddebug: Add passthrough for get_compute_param.Bas Nieuwenhuizen2016-05-131-0/+12
* vl/dri: fix close fd error outLeo Liu2016-05-121-3/+5
* nvc0: fix indentation in nvc0_invalidate_resource_storage()Samuel Pitoiset2016-05-121-52/+52
* nvc0: save some CPU cycles in nvc0_context_unreference_resources()Samuel Pitoiset2016-05-121-8/+6
* nvc0: invalidate texture buffers for computeSamuel Pitoiset2016-05-121-3/+8
* swr: properly expose compressed format supportTim Rowley2016-05-122-0/+23
* nvc0: fix gl_SampleMaskIn computationIlia Mirkin2016-05-1110-5/+94
* nv50/ir: generalize interp fixups to be able to fixup anythingIlia Mirkin2016-05-1110-60/+71
* nir/algebraic: Separate ffma lowering from fusingJason Ekstrand2016-05-111-0/+1
* gallium: add NIR as a possible IRRob Clark2016-05-113-0/+16
* gallium: refactor pipe_shader_state to support multiple IR'sRob Clark2016-05-117-20/+55
* freedreno: fix multi-layer transfer_map'sRob Clark2016-05-111-1/+1
* gallivm: improve dumping of bitcodeRoland Scheidegger2016-05-112-4/+9
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