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* st/mesa: pin driver threads to a fixed CCX when glthread is enabledMarek Olšák2018-11-202-56/+10
* gallium/u_tests: fix MSVC build by using old-style zero initializersMarek Olšák2018-11-201-3/+3
* gallium/u_tests: add a compute shader test that clears an imageMarek Olšák2018-11-201-0/+77
* meson: Add tests to suitesDylan Baker2018-11-202-2/+4
* nir: Make nir_lower_clip_vs optionally work with variables.Kenneth Graunke2018-11-192-2/+3
* etnaviv: use dummy RT buffer when rendering without color bufferLucas Stach2018-11-193-2/+19
* virgl: fix vtest regression since fencing changes.Dave Airlie2018-11-191-0/+1
* radeonsi: fix an out-of-bounds read reported by ASANNicolai Hähnle2018-11-191-0/+4
* r600: Only set context streamout strides info from the shader that has outputsGert Wollny2018-11-191-3/+9
* virgl: Use file descriptor instead of un-allocated objectGert Wollny2018-11-191-1/+1
* virgl: Clean up fences commitRobert Foss2018-11-184-4/+1
* nv50/ir/ra: enforce max register requirement, and change spill orderIlia Mirkin2018-11-164-16/+26
* nv50/ir/ra: improve condition for short regs, unify with cond for 16-bitIlia Mirkin2018-11-161-7/+7
* nv50/ir: delete MINMAX instruction that is no longer in the BBIlia Mirkin2018-11-161-1/+1
* virgl: native fence fd supportRobert Foss2018-11-167-16/+166
* vc4: Don't return a vc4 BO handle on a renderonly screen.Eric Anholt2018-11-151-2/+4
* vc4: Make sure we make ro scanout resources for create_with_modifiers.Eric Anholt2018-11-151-1/+9
* v3d: Fix double-swapping of R/B on V3D 4.1Eric Anholt2018-11-151-2/+3
* etnaviv: Make sure rs alignment checks matchGuido Günther2018-11-151-6/+13
* radeonsi: fix video APIs on Raven2Marek Olšák2018-11-142-4/+8
* st/xa: Bump minorThomas Hellstrom2018-11-141-1/+1
* st/xa: Support Component Alpha with trivial blendingThomas Hellstrom2018-11-143-17/+35
* st/xa: Minor renderer cleanupsThomas Hellstrom2018-11-141-12/+12
* st/xa: Fix transformations when we have both source and mask samplersThomas Hellstrom2018-11-141-68/+49
* st/xa: Support a couple of new formatsThomas Hellstrom2018-11-142-9/+29
* st/xa: Support higher color precision for solid picturesThomas Hellstrom2018-11-142-26/+100
* st/xa: Render update. Better support for solid picturesThomas Hellstrom2018-11-145-440/+225
* virgl: Add command and flags to initiate debugging on the host (v2)Gert Wollny2018-11-135-0/+37
* freedreno/drm: fix unused 'entry' warningsRob Clark2018-11-121-2/+0
* st/nine: clean up thead shutdown sequence a bitAndre Heider2018-11-091-4/+2
* st/nine: plug thread related leaksAndre Heider2018-11-092-0/+9
* st/nine: fix stack corruption due to ABI mismatchAndre Heider2018-11-091-1/+13
* radeonsi: stop command submission with PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET onlyMarek Olšák2018-11-0915-20/+27
* gallium: add PIPE_CONTEXT_LOSE_CONTEXT_ON_RESETMarek Olšák2018-11-091-0/+3
* radeonsi: don't set the CB clear color registers for 0/1 clear colors on Raven2Marek Olšák2018-11-094-3/+11
* radeonsi: use better DCC clear codesMarek Olšák2018-11-091-5/+21
* gallivm: fix improper clamping of vertex index when fetching gs inputsRoland Scheidegger2018-11-091-10/+31
* gm107/ir: fix compile time warning in getTEXSMaskKarol Herbst2018-11-071-0/+1
* winsys/amdgpu: Stop using amdgpu_bo_handle_type_kms_noimportMichel Dänzer2018-11-071-3/+3
* gm107/ir: use scalar tex instructions where possibleKarol Herbst2018-11-062-3/+317
* nv50/ir: add scalar field to TexInstructionsKarol Herbst2018-11-062-1/+6
* nv50/ra: add condenseDef overloads for partial condensesKarol Herbst2018-11-061-8/+21
* nv50/ir: print color masks of tex instructionsKarol Herbst2018-11-061-4/+33
* r600: Add support for EXT_texture_sRGB_R8Gert Wollny2018-11-061-0/+1
* freedreno/a6xx: Clear z32 and separate stencil with blitterKristian H. Kristensen2018-11-062-27/+50
* freedreno/a6xx: fix VSC bug with larger # of tilesRob Clark2018-11-061-5/+2
* freedreno: update generated headersRob Clark2018-11-067-29/+51
* st/va: fix incorrect use of resource_destroyMarek Olšák2018-11-051-4/+2
* r600/sb: Fix constant logical operand in assert.Vinson Lee2018-11-041-1/+1
* vc4: Use the normal simulator ioctl path for CL submit as well.Eric Anholt2018-11-023-13/+5
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