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* broadcom/vc5: Set up MSAA texture type according to the internal format.Eric Anholt2017-10-302-2/+39
| | | | | It gets most of EXT_framebuffer_multisample-formats passing, but doesn't really work for texture views.
* broadcom/vc5: Use the sampler view's format, not the resource's.Eric Anholt2017-10-303-8/+1
| | | | | This should help with texture views, though I just noticed this while reading the code.
* broadcom/vc5: Emit raw loads for MSAA buffers.Eric Anholt2017-10-301-0/+58
| | | | | Similar to stores, but we also need to emit dummy stores in between each load, to flush out the previous queued load.
* broadcom/vc5: Use raw stores for MSAA buffers.Eric Anholt2017-10-301-15/+97
| | | | | | | | | | | We were storing the resolved pixels in all cases, but nr_samples > 0 means we should be keeping the per-sample values. We will probably want to change the job structure at some point, as we'll want to recognize full-buffer resolves and do the resolved store in the same job as the original rendering, meaning we'll need to track both the MSAA and single-sample resources in the job. However, this will be enough to build the rest of the MSAA support.
* broadcom/vc5: Add lowering for txf_ms to a txf on a 2x2-scaled texture.Eric Anholt2017-10-301-2/+0
| | | | | | | | | The HW has no native sampler support for multisample textures, but since we only need to support txf_ms and the layout is UIF, we just need to scale up the texcoords and then add in the sample. This drops the old TEXTURE_MSAA_ADDR special uniform, since we're treating MSAA textures as textures, rather than basically texbos like VC4 had to.
* broadcom/vc5: Lay out MSAA textures/renderbuffers as UIF scaled by 4.Eric Anholt2017-10-302-14/+37
| | | | | | We just need to multiply width/height by 2 each, and always set them up as UIF tiling, since that's how the TLB will store them in raw (per-sample) mode.
* broadcom/vc5: Add PIPE_TEX_WRAP_CLAMP support for linear-filtered textures.Eric Anholt2017-10-301-2/+6
| | | | | | I already had the texture's wrapping set up to use different behavior for nearest or linear, so we just needed to saturate the coordinates in linear mode to get the "proper" blend between the edge and border values.
* broadcom/vc5: Disable GL_ARB_transform_feedback3.Eric Anholt2017-10-301-1/+1
| | | | We don't seem to have a way to generally handle gl_SkipComponents.
* broadcom/vc5: Fix gl_FragCoord pixel center setup.Eric Anholt2017-10-301-3/+4
| | | | Fixes glsl-arb-fragment-coord-conventions.
* broadcom/vc5: Always set up 1D textures as raster order.Eric Anholt2017-10-301-0/+5
| | | | | | 1D is the exception to "all V3D textures are tiled", since tiling 1D textures would just waste memory and cache space. This ended up being a problem once we started actually marking 1D textures as 1D instead of 2D.
* broadcom/vc5: Fix GPU hang with no vertex elements used by the VS.Eric Anholt2017-10-301-4/+24
| | | | | | Like VC4, we need to at least have one element set up, but unlike VC4 it seems we don't need to read it to keep the HW happy. Fixes GPU hangs with glsl-no-vertex-attribs.shader_test.
* Android: move drivers' symlinks to /vendor (v2)Mauro Rossi2017-10-301-2/+3
| | | | | | | | | | | | | | | | Having moved gallium_dri.so library to /vendor/lib/dri also symlinks need to be coherently created using TARGET_OUT_VENDOR instead of TARGET_OUT or all non Intel drivers will not be loaded with Android N and earlier, thus causing SurfaceFlinger SIGABRT (v2) simplification of post install command Fixes: c3f75d483c ("Android: move libraries to /vendor") Cc: 17.3 <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> (v1) Reviewed-by: Rob Herring <[email protected]> (v1) Reviewed-by: Emil Velikov <[email protected]>
* etnaviv: add ext_texture_srgb supportChristian Gmeiner2017-10-283-1/+10
| | | | | | | | | | | | | | Following piglits are passing: - glean@texture_srgb - spec@ext_texture_srgb@fbo-srgb - spec@ext_texture_srgb@tex-srgb - spec@ext_texture_srgb@texwrap formats - spec@ext_texture_srgb@texwrap formats-s3tc Btw. this enables GL 2.1 :-) Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* gallium: s/unsigned/enum pipe_prim_type/Brian Paul2017-10-276-7/+8
| | | | | | In the vbuf_render::set_primitive() functions. Reviewed-by: Roland Scheidegger <[email protected]>
* draw: don't cull tris with zero areaRoland Scheidegger2017-10-272-3/+12
| | | | | | | | | | | | | | Culling tris with zero area seems like a great idea, but apparently with fill mode line (and point) we're supposed to draw them, at least some tests for some other state tracker complained otherwise. Such tris also always seem to be back facing (not sure if this can be inferred from anything, since in a mathematical sense it cannot really be determined), so make sure to account for this when filling in the face information. (For solid tris, this is of course unnecessary, drivers will throw the tris away later in any case.) Reviewed-by: Brian Paul <[email protected]>
* meson: Add a dependency on nir_opcodes_h for freedrenoDylan Baker2017-10-271-1/+1
| | | | | | | This fixes a race condition in the build. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* meson: build gallium based osmesaDylan Baker2017-10-273-1/+102
| | | | | | | | | | This has been tested with the osdemo from mesa-demos v2: - Add SELinux dependency - fix typo GALLIUM_LLVM -> GALLIUM_LLVMPIPE Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* meson: move gallium include declarations to srcDylan Baker2017-10-272-3/+0
| | | | | | | | These are used by non-gallium osmesa, so they need to be defined outside of the gallium subdirectory. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* gallium/os: fix align_malloc() / os_malloc_aligned() comment mix-upBrian Paul2017-10-271-1/+1
| | | | | os_free_aligned() is the counterpart to os_malloc_aligned(). Trivial.
* vc4: fix release buildEric Engestrom2017-10-271-6/+6
| | | | | | | | | | | Mesa's DEBUG and assert's NDEBUG are not tied to each other, so we need to explicitly compile this code out. Fixes: 3df78928786134874eafa "vc4: Drop reloc_count tracking for debug asserts on non-debug builds." Cc: Eric Anholt <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* radeonsi: update hack for HTILE corruption in ARK: Survival EvolvedSamuel Pitoiset2017-10-274-9/+9
| | | | | | | | | | | | It appears that flushing the DB metadata is actually not sufficient since the driver uses the new VS blit shaders. This looks quite strange though, but it seems like we need to flush DB for fixing the corruption. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955 Fixes: 69ccb9dae7 (radeonsi: use new VS blit shaders (VS inputs in SGPRs) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add a workaround for weird s_buffer_load_dword behavior on SIMarek Olšák2017-10-261-3/+10
| | | | | | | | | | | | | | See my LLVM patch which fixes the root cause. Users have to apply this patch and then they have 2 choices: - Downgrade to LLVM 5.0 - Update to LLVM git after my LLVM patch is pushed. It won't be possible to use current and earlier development version of LLVM 6.0. Reviewed-by: Nicolai Hähnle <[email protected]> Cc: 17.3 <[email protected]>
* winsys/svga/drm: add ERESTART define for *BSDGreg V2017-10-261-0/+5
| | | | | | | Obtained from: FreeBSD ports Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* freedreno: implement pipe->invalidate_resource()Rob Clark2017-10-262-1/+28
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: GL_ARB_texture_barrierRob Clark2017-10-262-1/+13
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: rename invalidate_resource()Rob Clark2017-10-261-8/+9
| | | | | | This is different from pipe->invalidate_resource().. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: mem2gmem is read-only for BORob Clark2017-10-261-1/+1
| | | | | | | | This should be OUT_RELOC() since the operation isn't writing to the buffer. Technically it doesn't matter much currently, since we'd anyways to a gmem2mem later. But that will change. Signed-off-by: Rob Clark <[email protected]>
* freedreno: small renameRob Clark2017-10-261-4/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeon/video: add gfx9 offsets when rejoin the video surfaceLeo Liu2017-10-261-1/+4
| | | | | | | | For CPU access. Signed-off-by: Leo Liu <[email protected]> Cc: [email protected] Reviewed-by: Christian König <[email protected]>
* ac/llvm: consolidate find lsb function.Dave Airlie2017-10-261-25/+2
| | | | | | | This was the same between si and ac. Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: move lds declaration/load/store into shared code.Dave Airlie2017-10-262-16/+5
| | | | | | | This was duplicated between both drivers, share here. Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* clover: Fix compilation after clang r315871Jan Vesely2017-10-252-5/+12
| | | | | | | | | | v2: use a more generic compat function v3: rename and formatting cleanup Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103388 Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> CC: <[email protected]>
* gallium/util: remove some block alignment assertionsRoland Scheidegger2017-10-251-8/+0
| | | | | | | | | | | | | These assertions were revisited a couple of times in the past, and they still weren't quite right. The problem I was seeing (with some other state tracker) was a copy between two 512x512 s3tc textures, but from mip level 0 to mip level 8. Therefore, the destination has only size 2x2 (not a full block), so the box width/height was only 2, causing the assertion to trigger for src alignment. As far as I can tell, such a copy is completely legal, and because a correct assertion would get ridiculously complicated just get rid of it for good. Reviewed-by: Brian Paul <[email protected]>
* meson: build freedrenoRob Clark2017-10-244-1/+256
| | | | | | | | Mostly copy/pasta from Dylan Baker's conversion of nouveau and i965. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* freedreno/ir3: use a flag instead of setting PYTHONPATHRob Clark2017-10-243-6/+23
| | | | | | | | | | Similar to 848da662224326ccfbe6647bc82f4f89ca22c762, pass an arg to ir3_nir_trig.py to add to python path, rather than using $PYTHONPATH, to prep for meson build support. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* freedreno: per-context fd_pipeRob Clark2017-10-249-12/+20
| | | | | | | | To enable per-context priorities, we need to have per-context pipe's. Unfortunately we still need to keep the global screen pipe, mostly just for screen->get_timestamp(). Signed-off-by: Rob Clark <[email protected]>
* freedreno: rename pipe -> vsc_pipeRob Clark2017-10-246-15/+15
| | | | | | | | To add context priority support we need to have an fd_pipe per context, rather than per-screen. Which conflicts with existing ctx->pipe (which is actually a visibility stream pipe (hw resource). So just rename it. Signed-off-by: Rob Clark <[email protected]>
* freedreno: pass context flags through to fd_context_init()Rob Clark2017-10-246-6/+6
| | | | | | Prep work for later patch. Signed-off-by: Rob Clark <[email protected]>
* gallium/util: use util_snprintf() in u_socket_connect()Brian Paul2017-10-241-1/+2
| | | | | | | | | Instead of plain snprintf(). To fix the MSVC build. snprintf() is used in various places in Mesa/gallium, but apparently, not in code built with MSVC. Reviewed-by: Eric Engestrom <[email protected]>
* radeonsi: postponed KILL isn't postponed anymore, but maintains WQMMarek Olšák2017-10-241-0/+6
| | | | | | | | | | | | | This restores performance for the drirc workaround, i.e. KILL_IF does: visible = src0 >= 0; kill_flag &= visible; // accumulate kills amdgcn_kill(wqm_vote(visible)); // kill fully dead quads only And all helper pixels are killed at the end of the shader: amdgcn_kill(kill_flag); Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use postponed KILL only when derivatives are usedMarek Olšák2017-10-244-3/+9
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: replace ac_build_kill with ac_build_kill_if_falseMarek Olšák2017-10-242-52/+38
| | | | | | | This will be a new LLVM intrinsic and will also work nicely with llvm.amdgcn.wqm.vote. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/util: don't call close() on Windows in u_tests.cBrian Paul2017-10-231-0/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: use util_strdup() macro in u_debug_symbol.cBrian Paul2017-10-231-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/util: replace gethostbyname() with getaddrinfo()Brian Paul2017-10-231-13/+22
| | | | | | | | | | Compiling with MSVC options /we4995 /we4996 (a subset of /sdl) generates a warning that the gethostbyname() function is deprecated in favor of getaddrinfo() or GetAddrInfoW(). Replace the call with getaddrinfo(). Untested. There are no callers to u_socket_connect() in Gallium. Reviewed-by: Nicolai Hähnle <[email protected]>
* meson: build imx driverDylan Baker2017-10-233-1/+36
| | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* meson: build etnaviv driver + winsysDylan Baker2017-10-234-1/+135
| | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* ac/nir: Only clamp shadow reference on radeonsi.Bas Nieuwenhuizen2017-10-231-0/+1
| | | | | | | | | | | | | | | | | | Vulkan CTS does not expect the value to be clamped (at least for D32), and it makes a differences even though depth is in [0,1], due to strict inequalities. I couldn't find anything in the Vulkan spec about this, but the test seemed to be copied from GL tests and the GL spec only specifies clamping for fixed point formats. Hence I expect radeonsi to run into this at some point as well, but given that they still have a usecase with the Z16->Z32 promotion, I'll leave that for someone else to clean up. This at least fixes radv dEQP-VK.texture.shadow.* on VI. Fixes: 0f9e32519bb 'ac/nir: clamp shadow texture comparison value on VI' Reviewed-by: Dave Airlie <[email protected]>
* broadcom/vc4: Fix aliasing issueStefan Schake2017-10-201-1/+1
| | | | | | | This was causing Android clang version 3.8.256229 to miscompile, presumably due to strict aliasing. Fixes: 14dc281c1332 ("vc4: Enforce one-uniform-per-instruction after optimization.")
* radeonsi: hardcode shader WAVE_LIMIT to the maximum valueAndres Rodriguez2017-10-211-7/+14
| | | | | | | | | | | | | This is part of a cooperative scheduling approach used by radv. All drivers in the stack must opt-in to resource arbitration, otherwise GL based apps will be able to ignore system priorities. We always hardcode the field to its maximum value, instead of attempting to calculate an approximate usage. In testing, there were no benefits to using anything other than the maximum. Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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