summaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
* swr: add PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT to get_paramTim Rowley2016-04-211-0/+1
* st/dri: add 32-bit RGBX/RGBA formatsRob Herring2016-04-212-0/+10
* gallium/radeon: Silence possibly uninitialized variable warning.Bas Nieuwenhuizen2016-04-211-1/+1
* winsys/amdgpu: Silence possibly uninitialized variable warning.Bas Nieuwenhuizen2016-04-211-0/+3
* radeonsi: Enable loading into CE RAM.Bas Nieuwenhuizen2016-04-213-0/+14
* radeonsi: Use defines for CONTEXT_CONTROL instead of magic values.Bas Nieuwenhuizen2016-04-212-2/+5
* winsys/amdgpu: fix preamble IB sizeThomas Hindoe Paaboel Andersen2016-04-211-0/+1
* gk110/ir: make use of IMUL32I for all immediatesSamuel Pitoiset2016-04-201-1/+1
* gk110/ir: do not overwrite def value with zero for EXCH opsSamuel Pitoiset2016-04-201-6/+15
* nir: rename nir_foreach_block*() to nir_foreach_block*_call()Connor Abbott2016-04-205-5/+5
* nvc0: avoid tex read fault from compute shaders on GK110Samuel Pitoiset2016-04-201-0/+3
* swr: fix resource backed constant buffersTim Rowley2016-04-202-7/+7
* nouveau: codegen: Add support for OpenCL global memory buffersHans de Goede2016-04-201-2/+10
* nouveau: codegen: Use FILE_MEMORY_BUFFER for buffersHans de Goede2016-04-206-5/+13
* st/dri: implement the GL interop DRI extension (v2.2)Marek Olšák2016-04-201-0/+258
* st/dri: Fix RGB565 EGLImage creationNicolas Dufresne2016-04-201-20/+24
* st/dri: Factor out DRI2 to PIPE_FORMAT conversionNicolas Dufresne2016-04-201-34/+27
* freedreno/a4xx: lower srgb in shader for astc texturesRob Clark2016-04-197-6/+62
* freedreno: cleanup fd_set_sampler_viewsRob Clark2016-04-191-37/+24
* tgsi/lowering: improved lowering for LRPRussell King2016-04-191-35/+20
* tgsi/lowering: improved lowering for XPDRussell King2016-04-191-22/+13
* tgsi/lowering: add support for lowering TRUNCRussell King2016-04-192-0/+85
* tgsi/lowering: add support for lowering FLR and CEILRussell King2016-04-192-20/+149
* radeonsi: enable TGSI support cap for compute shadersBas Nieuwenhuizen2016-04-192-7/+30
* radeonsi: Consider input SGPR count for compute shader SGPR count.Bas Nieuwenhuizen2016-04-192-6/+13
* radeonsi: Add CE synchronization for compute dispatches.Bas Nieuwenhuizen2016-04-193-2/+8
* radeonsi: clean up compute flushBas Nieuwenhuizen2016-04-192-18/+8
* radeonsi: do not do two full flushes on every compute dispatchBas Nieuwenhuizen2016-04-195-22/+17
* radeonsi: split setting graphics and compute descriptorsBas Nieuwenhuizen2016-04-194-14/+59
* radeonsi: split texture decompression for compute shadersBas Nieuwenhuizen2016-04-194-4/+16
* radeonsi: update predicate condition for compute dispatchesBas Nieuwenhuizen2016-04-192-0/+15
* radeonsi: implement TGSI compute dispatchBas Nieuwenhuizen2016-04-191-27/+77
* radeonsi: only emit compute shader state when switching shadersBas Nieuwenhuizen2016-04-192-59/+88
* radeonsi: rework compute scratch bufferBas Nieuwenhuizen2016-04-193-93/+47
* radeonsi: do per cs setup for compute shaders once per csBas Nieuwenhuizen2016-04-193-32/+48
* radeonsi: don't pass scratch buffer to user SGPRsBas Nieuwenhuizen2016-04-191-8/+0
* radeonsi: split input upload off from si_launch_gridBas Nieuwenhuizen2016-04-191-41/+52
* radeonsi: implement TGSI compute shader creationBas Nieuwenhuizen2016-04-191-18/+58
* radeonsi: update shader count for compute shadersBas Nieuwenhuizen2016-04-191-1/+2
* radeonsi: set maximum work group size based on block sizeBas Nieuwenhuizen2016-04-191-0/+12
* radeonsi: implement shared atomicsBas Nieuwenhuizen2016-04-191-1/+76
* radeonsi: implement shared memory load/storeBas Nieuwenhuizen2016-04-191-2/+82
* radeonsi: add shared memoryBas Nieuwenhuizen2016-04-194-0/+37
* radeonsi: lower compute shader argumentsBas Nieuwenhuizen2016-04-192-0/+50
* radeonsi: Use CE for all descriptors.Bas Nieuwenhuizen2016-04-191-10/+64
* gallium/util: Add u_bit_scan_consecutive_range64.Bas Nieuwenhuizen2016-04-191-0/+14
* radeonsi: Replace list_dirty with a mask.Bas Nieuwenhuizen2016-04-192-17/+29
* radeonsi: Add CE uploader.Bas Nieuwenhuizen2016-04-193-0/+37
* radeonsi: Allocate chunks of CE ram.Bas Nieuwenhuizen2016-04-192-9/+27
* radeonsi: Add CE synchronization.Bas Nieuwenhuizen2016-04-192-0/+27