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* u_blitter: bind a NULL geometry shaderMarek Olšák2011-10-082-1/+32
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* u_blitter: cleanup checking for and restoring saved statesMarek Olšák2011-10-082-98/+172
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* r300g: disable stream output on SWTCL chipsetsMarek Olšák2011-10-081-1/+1
| | | | Unimplemented and not so useful for this driver.
* i915g: Add two new unsupported PIPE_CAPs.Stéphane Marchesin2011-10-071-0/+2
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* i915g: handle seperate stencil clearDaniel Vetter2011-10-071-0/+10
| | | | Signed-off-by: Daniel Vetter <[email protected]>
* i915g: actually try to clear 16bit depth bufsDaniel Vetter2011-10-071-1/+1
| | | | | | ... with the right value. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: hw can't fastclear both depth and color when bbp doesn't matchDaniel Vetter2011-10-071-29/+93
| | | | | | | | Do it in two passes in that case. v2: Don't forget to handle stencil clears. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: disable scissor in fast clearDaniel Vetter2011-10-071-4/+6
| | | | | | Docs say this is obeyed. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: add some obscure sampler formatsDaniel Vetter2011-10-071-1/+3
| | | | | | 4bit palette ftw! Signed-off-by: Daniel Vetter <[email protected]>
* i915g: fixup clear params emissionDaniel Vetter2011-10-071-1/+8
| | | | | | | | | | | | | | | | | Docs say that default shader input color input need to be spec as ARGB8888. And a clear rect prim essentially uses this value instead of default diffuse. Depth on the other hands is an ieee 32 bit float. Clear stencil is U8. Completely different are the clear values for zone init prims. These are speced in the actual output pixel layout (and need to be repeated for 16 bit formats). Clear up the confusion by adding some comments. v2: Retain the target swizzling support added by Stephan Marchesin. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: make fixup swizzle into a real hw stateDaniel Vetter2011-10-073-41/+45
| | | | | | This way it can be reused in the fastclear path. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: Announce GL 2.0.Stéphane Marchesin2011-10-061-1/+1
| | | | We leave the debug code in place to troubleshoot issues while we complete the transition. That code might be removed after that.
* i915g: Silence warning.Stéphane Marchesin2011-10-061-1/+1
| | | | We still need to investigate LIS7 though.
* i915g: Fix comment.Stéphane Marchesin2011-10-051-1/+1
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* st/glx: remove the duplicated Drawable member.Stéphane Marchesin2011-10-053-7/+6
| | | | If you want to access it, you should use the Drawable in xlib_drawable instead.
* llvmpipe: Fix the 4 planes (lines) case properly.José Fonseca2011-10-052-16/+33
| | | | | | | | The previous change was not effective for lines, because there is no 4 planes 4x4 block rasterization path: it is handled by the 16x16 block case too, and the 16x16 block was not being budged as it should. This fixes assertion failures on line rasterization.
* llvmpipe: Ensure the 16x16 special rasterization path does not touch outside ↵José Fonseca2011-10-054-5/+31
| | | | | | | | | | | | | | the tile. llvmpipe has a few special rasterization paths for triangles contained in 16x16 blocks, but it allows the 16x16 block to be aligned only to a 4x4 grid. Some 16x16 blocks could actually intersect the tile if the triangle is 16 pixels in one dimension but 4 in the other, causing a buffer overflow. The fix consists of budging the 16x16 blocks back inside the tile.
* egl: restore missing \ in MakefileBrian Paul2011-10-041-1/+1
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* softpipe: fix Z interpolation invariance bugBrian Paul2011-10-041-1/+10
| | | | | | | | | We want quad/pixel Z values to be interpolated exactly the same for multi-pass algorithms. Because of how the optimized Z-test code is written, we can't cull the first quad in a run even if it's totally killed. See the comment for more info. NOTE: This is a candidate for the 7.11 branch.
* softpipe: add check for DO_PSTIPPLE_IN_HELPER_MODULEBrian Paul2011-10-041-0/+2
| | | | | We only want to generate the fragment shader variant that does stippling if DO_PSTIPPLE_IN_HELPER_MODULE is being used.
* configure: replace pkg-config calls with $(PKG_CONFIG) in the makefiles.Stéphane Marchesin2011-10-0426-36/+36
| | | | | | | Us poor souls who cross compile mesa want to be able to specify which pkg-config to pick, or at least just change one place. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* st/glx: Set the drawable attribute on xmesa_buffer creation.Stephen White2011-10-041-1/+1
| | | | Otherwise we'll be unable to use our pbuffers.
* r300g: fix rendering with a non-zero index bias in draw_elements_immediateMarek Olšák2011-10-041-1/+3
| | | | NOTE: This is a candidate for the stable branches.
* r600g: fix parsing TGSI declarationsMarek Olšák2011-10-041-2/+2
| | | | It was a lucky coincidence that it worked.
* r300/compiler: Fix error in OMOD optimizationTom Stellard2011-10-021-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | Classic compiler mistake. In the example below, the OMOD optimization was combining instructions 4 and 10, but since there was an instruction (#8) in between them that wrote to the same registers as instruction 10, instruction 11 was reading the wrong value. Example of the mistake: Before OMOD: 4: MAD temp[0].y, temp[3]._y__, const[0]._x__, const[0]._y__; ... 8: ADD temp[2].x, temp[1].x___, -temp[4].x___; ... 10: MUL temp[2].x, const[1].y___, temp[0].y___; 11: FRC temp[5].x, temp[2].x___; After OMOD: 4: MAD temp[2].x / 8, temp[3]._y__, const[0]._x__, const[0]._y__; ... 8: ADD temp[2].x, temp[1].x___, -temp[4].x___; ... 11: FRC temp[5].x, temp[2].x___; https://bugs.freedesktop.org/show_bug.cgi?id=41367
* r300/compiler: Rewrite source swizzles when using OMODTom Stellard2011-10-021-1/+6
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* r300/compiler: Fix rc_normal_rewrite_writemask()Tom Stellard2011-10-021-5/+4
| | | | This function had not been updated to use conversion swizzles.
* r300/compiler: Use consistent src swizzles for transcendent instructionsTom Stellard2011-10-025-6/+33
| | | | | | | | | | | | | | | Source swizzles for transcendent instructions were being stored in the X channel regardless of what channel the instruction was writing. This was causing problems for some helper functions that were expecting source swizzles to occupy channels corresponding to the instruction's writemask. This commit makes transcendent instructions follow the same convention as normal instructions for representing source swizzles. Previous behavior: LG2 temp[0].y, input[0].x___; Current behavior: LG2 temp[0].y, input[0]._x__;
* r600g: fix a compiler warningMarek Olšák2011-09-301-0/+1
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* gallium/docs: update the documentation of capabilitiesMarek Olšák2011-09-301-73/+84
| | | | Still like 13 caps are undocumented.
* r600g: move all files from winsys/r600 into drivers/r600Marek Olšák2011-09-3019-91/+11
| | | | | | Be sure to reconfigure after this commit. Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: move GEM domains out of the drivers into winsysMarek Olšák2011-09-3015-111/+82
| | | | | | | | | | | | | | | The drivers don't need to care about the domains. All they need to set are the bind and usage flags. This simplifies the winsys too. This also fixes on r600g: - fbo-depth-GL_DEPTH_COMPONENT32F-copypixels - fbo-depth-GL_DEPTH_COMPONENT16-copypixels - fbo-depth-GL_DEPTH_COMPONENT24-copypixels - fbo-depth-GL_DEPTH_COMPONENT32-copypixels - fbo-depth-GL_DEPTH24_STENCIL8-copypixels I can't explain it. Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: remove a redundant parameter 'size' from buffer_from_handleMarek Olšák2011-09-304-10/+5
| | | | | | It's part of pb_buffer already. Reviewed-by: Alex Deucher <[email protected]>
* r600g: remove struct radeon (or what's left of it)Marek Olšák2011-09-308-96/+18
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: move family and chip_class from struct radeon to r600_screenMarek Olšák2011-09-308-70/+57
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: merge r600_bo with r600_resourceMarek Olšák2011-09-3018-382/+243
| | | | | | | I have moved 'last_flush' and 'binding' from r600_bo to winsys/radeon. The other members are now part of r600_resource. Reviewed-by: Alex Deucher <[email protected]>
* gallium: add PIPE_CAP_TEXTURE_BARRIERMarek Olšák2011-09-305-1/+6
| | | | | | Same issue as with conditional_render. Reviewed-by: Brian Paul <[email protected]>
* gallium: add PIPE_CAP_CONDITIONAL_RENDERMarek Olšák2011-09-307-2/+9
| | | | | | | We were checking whether render_condition is set. That was not reliable, because it's always set with trace and noop regardless of driver support. Reviewed-by: Brian Paul <[email protected]>
* gallium: add and use PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERSMarek Olšák2011-09-3014-54/+60
| | | | | | | | | This removes: - PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS - PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS in favor of the that new per-shader cap. Reviewed-by: Brian Paul <[email protected]>
* gallium: remove PIPE_CAP_TEXTURE_MIRROR_REPEATMarek Olšák2011-09-3011-17/+0
| | | | | | | | | | All drivers support it (well, except Cell). The boolean option is going away from core Mesa too. This is a follow-up to Ian Romanick's patch "mesa: Remove ARB_texture_mirrored_repeat extension enable flag". Reviewed-by: Brian Paul <[email protected]>
* xorg/vmwgfx: Kill this target. It's not used anymore.Thomas Hellstrom2011-09-3013-2783/+0
| | | | | | | | | | | This fixes a build error introduced with commit "winsys/svga: Update to vmwgfx kernel module 2.1" if both the svga driver and the xorg state tracker was enabled at the same time. If needed we can re-add a minimal target for basic functionality. Signed-off-by: Thomas Hellstrom <[email protected]>
* winsys/svga: Update to vmwgfx kernel module 2.1Thomas Hellstrom2011-09-2911-263/+668
| | | | | | | | | Introduces fence objecs and a size limit on query buffers. The possibility to map the fifo from user-space is gone, and replaced by an ioctl that reads the 3D capabilities. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecranz <[email protected]>
* st/xa: Don't call fence_reference with an unitialized fence handle as dstThomas Hellstrom2011-09-291-1/+1
| | | | Signed-off-by: Thomas Hellstrom <[email protected]>
* st/xa: surfaces and sampler views are per contextThomas Hellstrom2011-09-295-63/+65
| | | | | | | | Don't store references to these on the surface but on the context. References to transfers are still stored on the surface since we allow only a single map of a surface at a time. Signed-off-by: Thomas Hellstrom <[email protected]>
* llvmpipe: Convert some of the null checks back to asserts.José Fonseca2011-09-291-26/+12
| | | | | | This turns some of the null check warnings in commit 023ca40d80670ac0eee8c755ca5f54b1e7c2712e back to asserts, as the underlying cause of fdo bug 40591 should be fixed now.
* llvmpipe: Also reset the state in lp_scene_bin_resetJosé Fonseca2011-09-291-0/+1
| | | | Prevents segfaults when a opaque tile is found without state change.
* llvmpipe: Prevent segfault during fs variant cache shrinking.José Fonseca2011-09-291-4/+15
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* tools/trace: Dump NULL literally.José Fonseca2011-09-291-0/+4
| | | | Instead of None.
* winsys/radeon: remove redundant member radeon_bo::sizeMarek Olšák2011-09-293-8/+5
| | | | It's part of pb_buffer already.
* winsys/radeon: simplify updating GEM domains for relocationsMarek Olšák2011-09-291-10/+2
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