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* ac: add load_tess_level() to the abiTimothy Arceri2018-01-091-0/+22
| | | | | | | | | | | | | | | | Fixes the following piglit tests in radeonsi: vs-tcs-tes-tessinner-tessouter-inputs-quads.shader_test vs-tcs-tes-tessinner-tessouter-inputs-tris.shader_test vs-tes-tessinner-tessouter-inputs-quads.shader_test vs-tes-tessinner-tessouter-inputs-tris.shader_test v2: make use of si_shader_io_get_unique_index_patch() via the helper in the previous patch rather than shader_io_get_unique_index() Reviewed-by: Nicolai Hähnle <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add load_tess_level() helperTimothy Arceri2018-01-091-14/+19
| | | | | | | | | | This will be shared by the tgsi and nir backends. v2: move si_shader_io_get_unique_index_patch() call inside the helper. Reviewed-by: Nicolai Hähnle <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]>
* nvc0: enable bindless on keplerIlia Mirkin2018-01-071-3/+3
| | | | | | | All the functionality is in. Maxwell will take a little bit more enablement work. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add bindless image support for keplerIlia Mirkin2018-01-0711-75/+272
| | | | | | | | A part of the driver constbuf area is allocated for bindless images. Any update requires uploading to all driver constbufs. This also extends the driver constbuf to 64KB, up from 2KB. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add support for bindless textures on kepler+Ilia Mirkin2018-01-0710-5/+183
| | | | | | | | | This keeps a list of resident textures (per context), and dumps that list into the active buffer list when submitting. We also treat bindless texture fetches slightly differently, wrt the meaning of indirect, and not requiring the SAMPLER file to be used. Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: use the image info in the instruction rather than declIlia Mirkin2018-01-071-52/+24
| | | | | | | | | | In preparation for bindless images, we have to retrieve the target/format info from the instruction directly, as there will be no declaration. Furthermore, for bound images, this information is still available in the instruction, so we can drop the declaration-based mechanism entirely. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: safen up lowering logic against overwriting reused valuesIlia Mirkin2018-01-071-2/+4
| | | | | | | | | I'm fairly sure both of the changed sites are OK as-is, but they're fragile, so this is just safening them up. Since this is happening pre-ssa, we don't want to be overwriting values that may potentially get used later on. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: update tic in-place when buffer address changesIlia Mirkin2018-01-072-14/+21
| | | | | | This is helpful for bindless, where changing TIC id's is undesirable. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: ensure that pushbuf keeps ref to old text/tls bosIlia Mirkin2018-01-071-0/+13
| | | | | | | | | If we free the bo, then the PTE may get deallocated immediately. We have to make sure that the submission includes a ref to the old bo so that it remains mapped for the duration of the command execution. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* st/glsl_to_nir/radeonsi: enable tessellation shadersTimothy Arceri2018-01-051-0/+2
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/tgsi: add patch support to tgsi_get_gl_varying_semantic()Timothy Arceri2018-01-051-3/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add dummy implementation of si_nir_scan_tess_ctrl()Timothy Arceri2018-01-053-0/+23
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-051-17/+25
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: make si_llvm_emit_tcs_epilogue compatible with emit_outputs abiTimothy Arceri2018-01-051-3/+7
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: gather tess propertiesTimothy Arceri2018-01-051-0/+29
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add tcs_rel_ids to the abiTimothy Arceri2018-01-052-10/+10
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add unpack_llvm_param() helperTimothy Arceri2018-01-051-6/+12
| | | | | | | | This allows us to pass the llvm param directly rather than looking it up. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add {tcs,tes}_patch_id to the abiTimothy Arceri2018-01-052-11/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add nir support for tcs outputsTimothy Arceri2018-01-051-0/+118
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_nir_load_input_tcs()Timothy Arceri2018-01-051-0/+45
| | | | | | V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add get_dw_address_from_generic_indices() helperTimothy Arceri2018-01-051-30/+46
| | | | | | | This will be used by both the tgsi and nir backends. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add load_tes_inputs() to the abiTimothy Arceri2018-01-051-0/+1
| | | | | | V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_nir_load_input_tes()Timothy Arceri2018-01-052-0/+59
| | | | | | V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* swr/rast: fix invalid sign masks in avx512 simdlib codeTim Rowley2018-01-043-3/+3
| | | | | | | Should be 0x80000000 instead of 0x8000000. Cc: [email protected] Reviewed-by: Bruce Cherniak <[email protected]>
* radeonsi: fix alpha-to-coverage if color writes are disabledJózef Kucia2018-01-041-0/+3
| | | | | | | | If alpha-to-coverage is enabled, we have to compute alpha even if color writes are disabled. Signed-off-by: Józef Kucia <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* ac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen2018-01-042-3/+3
| | | | | | | | | | | sync_files are in linux since 4.7, while the amdgpu fence_to_handle ioctl is only in 4.15. In particular we don't need it for sync_file in radv, because everything happens via syncobjs, which got support earlier than fence_to_handle. Reviewed-by: Marek Olšák <[email protected]>
* braodcom/vc5: Fix internal type/bpp for RGB10_A2UI images.Eric Anholt2018-01-031-0/+1
| | | | | I found that we were getting GPU hangs on most tests rendering to them, and the simulator was assertion failing.
* broadcom/vc5: Try to fix up compressed texture load/store.Eric Anholt2018-01-031-2/+15
| | | | | | We were trying to load/store the logical width/height number of compressed blocks. As long as the textures were large, single-level, and the load/store at (0,0), it kind of worked.
* broadcom/vc5: Fix image_h value for CPU-side tiling on miplevels > 1.Eric Anholt2018-01-031-1/+2
| | | | | Fixes overflow that caused failure in dEQP-GLES3.functional.texture.filtering.2d.sizes.128x128_linear.
* broadcom/vc5: Disable early Z when the stencil func isn't ALWAYS.Eric Anholt2018-01-031-1/+3
| | | | | | | | Apparently the other funcs will have observable differences when early Z is enabled. Fixes (new) simulator assertion failures in dEQP-GLES3.functional.rasterizer_discard.basic.clear_depth.
* broadcom/vc5: Introduce enums for internal depth/type, with V3D prefixes.Eric Anholt2018-01-035-57/+57
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* broadcom/vc5: Turn the output image format into an enum.Eric Anholt2018-01-031-45/+45
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* broadcom/vc5: Emit flat shade flags for varying components > 24.Eric Anholt2018-01-031-5/+32
| | | | | | | | | | This means that with no flatshading we'll emit the single-byte ZERO_ALL_FLAT_SHADE_FLAGS, and otherwise emit a set of FLAT_SHADE_FLAGS to get all the bits we need set. There's a _SET enum in the packet we could use to possibly set entire ranges of the bitfield without using another packet, but this at least fixes the conformance failure.
* broadcom/vc5: Emit proper flatshading code for glShadeModel(GL_FLAT).Eric Anholt2018-01-033-17/+3
| | | | | | | | In updating the simulator, behavior changed slightly so that our old code wasn't getting glxgears's flatshading interpolated right. Emit flat shading code just like we would for a normal flat-shaded varying, by passing a flag in the shader key for glShadeModel(GL_FLAT) state and customizing the color inputs based on that.
* braodcom/vc5: Rely on OVRTMUOUT always being set.Eric Anholt2018-01-036-41/+70
| | | | | | | | | | | | | | It seems that the HW team has decided that it's the only supported mode, and it's the mode I actually meant to be using but forgot. Our table of return_32_bit should have matched the default non-OVRTMUOUT behavior, so this change should be invisible. However, the change revealed that some my return_size checks for swizzling were a bit confused in the shadow case, so I had to move them to draw time once we have both the sampler and the view together. Fixes assertion failures in the updated simulator, where the non-OVRTMUOUT support has been removed.
* broadcom/vc5: Move texture return channel setup into the compiler.Eric Anholt2018-01-032-15/+8
| | | | | | | | The compiler decides how many LDTMUs we're going to emit, and that must match the P1 flags. This brings the return channel counting to a single place (so all that's passed into the compiler is "how many return channels you may request from this texture's format), and was a necessary step for shadow samplers once we stop using OVRTMUOUT=0.
* broadcom/vc5: Switch to setting the primitive list format in the RCL.Eric Anholt2018-01-032-5/+8
| | | | | | This means that we get a single copy of it emitted, instead of once at the start of each tile (though it's still executed once per tile). Fixes assertion failures with the updated simulator.
* broadcom/vc5: Switch to using the C++ interface for the simulator.Eric Anholt2018-01-035-8/+128
| | | | | | In newer versions they've removed the C interface, so make one here. This also isolates the Mesa codebase from the simulator codebase, so we don't have conflicts over things like "unreachable"
* st/dri: Add option to control exposure of 10 bpc color configs.Mario Kleiner2018-01-032-0/+9
| | | | | | | | | | | | Some clients may not like rgb10 fbconfigs and visuals. Support driconf option 'allow_rgb10_configs' on gallium to allow per application enable/disable. The option defaults to enabled. Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* st/dri: Add support for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-1/+14
| | | | | | | | | Exposes RGBA 10 10 10 2 and 10 10 10 0 visuals and fbconfigs for rendering. Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* st/dri: Support texture_from_pixmap for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-0/+3
| | | | | | Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* st/dri2: Add buffer handling for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-0/+13
| | | | | | Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* st/dri2: Add format translations for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-0/+28
| | | | | | Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* swr/rast: fix MemoryBuffer build break for llvm-6Tim Rowley2018-01-031-0/+4
| | | | | | | | LLVM api change. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104381 Tested-by: Laurent Carlier <[email protected]> Reviewed-By: Bruce Cherniak <[email protected]>
* etnaviv: disable in-place resolve for non-supertiled surfacesLucas Stach2018-01-011-0/+1
| | | | | | | | | | | The in-place resolve probably has some additional restrictions when not operating on a super tiled surface. Disable it on non-supertiled surfaces for now to work around a GPU hang. Fixes: 78ade659569e ("etnaviv: Do GC3000 resolve-in-place when possible") Cc: [email protected] Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* nv50/ir: Fix unused var warnings in release buildRhys Kidd2017-12-292-2/+4
| | | | | | | | v2: Add preventative comment (Ilia Mirkin) Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Pierre Moreau <[email protected]> Signed-off-by: Rhys Kidd <[email protected]>
* nvc0: Fix unused var warnings in release buildRhys Kidd2017-12-291-3/+4
| | | | | Reviewed-by: Pierre Moreau <[email protected]> Signed-off-by: Rhys Kidd <[email protected]>
* nv50: Fix unused var warning in release buildRhys Kidd2017-12-291-1/+2
| | | | | Reviewed-by: Pierre Moreau <[email protected]> Signed-off-by: Rhys Kidd <[email protected]>
* r600: fix textureSize queries with tbosRoland Scheidegger2017-12-302-24/+33
| | | | | | | | | | | | | | piglit doesn't care, but I'm quite confident that the size actually bound as range should be reported and not the base size of the resource (and some quick piglit test hacking confirms this). Also, the array in the constant buffer looks overallocated by a factor of 4. For eg, also decrease the size by another factor of 2 by using the same constant slot for both buffer size (required for txq for TBOs) and the number of layers for cube arrays, as these are mutually exclusive. Could of course use some more logic and only actually do this for the samplers/images/buffers where it's required rather than for all, but ah well... Reviewed-by: Dave Airlie <[email protected]>
* r600: kill off native_integer shader ctx flagRoland Scheidegger2017-12-301-18/+0
| | | | | | Maybe upon a time it wasn't always true. Reviewed-by: Dave Airlie <[email protected]>
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