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* cso: add cso_get_pipe_contextMarek Olšák2017-11-252-0/+5
* gallium/hud: pass pipe_context explicitly to most functionsMarek Olšák2017-11-255-64/+57
* gallium/hud: split hud_draw into 3 separate functionsMarek Olšák2017-11-256-79/+99
* st/dri: remove dead code and incorrect comment around make_currentMarek Olšák2017-11-251-13/+0
* st/dri: clean up dri_unbind_contextMarek Olšák2017-11-251-3/+4
* radeonsi: expose all CB performance counters on StoneyMarek Olšák2017-11-251-1/+1
* radeonsi: handle imported textures with DCC robustlyMarek Olšák2017-11-251-1/+1
* radeonsi: fix a typo in creating monolithic ES-GSMarek Olšák2017-11-251-1/+1
* radeonsi: don't write undefined output channels to LDS in LSMarek Olšák2017-11-251-0/+3
* radeonsi: use ac.lds for shared memoryMarek Olšák2017-11-253-5/+3
* radeonsi: do 64-bit LDS loads recursivelyMarek Olšák2017-11-251-7/+9
* etnaviv: Emit vertex buffers consecutivelyWladimir J. van der Laan2017-11-231-4/+4
* r600: set DX10_CLAMP for compute shader tooRoland Scheidegger2017-11-231-2/+3
* r600/shader: Fix all warnings issed with "-Wall -Wextra"Gert Wollny2017-11-221-31/+36
* r600: Emit EOP for more CF instruction typesGert Wollny2017-11-224-7/+16
* broadcom/vc5: Fix BASE_LEVEL handling with txl.Eric Anholt2017-11-221-0/+4
* broadcom/vc5: Fix array texture layer count setup.Eric Anholt2017-11-221-1/+6
* broadcom/vc5: Don't increment primitive queries while they're paused.Eric Anholt2017-11-221-1/+3
* broadcom/vc5: Fix incorrect padding of TF outputs.Eric Anholt2017-11-221-0/+2
* broadcom/vc5: Fix UIF surface size setup for ARB_fbo's mismatched sizes.Eric Anholt2017-11-221-2/+23
* etnaviv: Put HALTI level in specsWladimir J. van der Laan2017-11-222-0/+23
* etnaviv: Const-correctness etnaviv_emit.hWladimir J. van der Laan2017-11-221-1/+1
* meson: add si_driinfo.h in libgallium_driJuan A. Suarez Romero2017-11-221-0/+1
* llvmpipe: fix snorm blendingRoland Scheidegger2017-11-214-53/+191
* r600: add cull distance supportDave Airlie2017-11-216-6/+24
* meson: Guard the gallium dri componenetDylan Baker2017-11-201-2/+4
* broadcom/vc5: Align 1D texture miplevels to 64b.Eric Anholt2017-11-201-0/+2
* broadcom/vc5: Clamp min lod to the last level.Eric Anholt2017-11-201-2/+3
* broadcom/vc5: Increase simulator memory for tex-miplevel-selection.Eric Anholt2017-11-201-1/+1
* swr/rast: Repair simd8 frontend code rotTim Rowley2017-11-201-1/+1
* swr/rast: Implement AVX-512 GATHERPS in SIMD16 fetch shaderTim Rowley2017-11-204-29/+220
* swr/rast: Simplify GATHER* jit builder apiTim Rowley2017-11-204-48/+48
* swr/rast: Add alignment to transpose targetsTim Rowley2017-11-201-8/+8
* swr/rast: Cache eventmanagerTim Rowley2017-11-203-0/+9
* swr/rast: Enable AVX-512 targets in the jitterTim Rowley2017-11-202-10/+0
* swr/rast: Points with clipdistance can't go through simplepoints pathTim Rowley2017-11-201-1/+2
* swr/rast: Code style change (NFC)Tim Rowley2017-11-201-2/+7
* swr/rast: Widen fetch shader to SIMD16Tim Rowley2017-11-205-3/+151
* swr/rast: Support flexible vertex layout for DS outputTim Rowley2017-11-202-0/+3
* gallium/u_threaded: avoid syncing in threaded_context_flushNicolai Hähnle2017-11-203-5/+17
* radeonsi: avoid syncing the driver thread in si_fence_finishNicolai Hähnle2017-11-203-37/+49
* radeonsi: recompute the relative timeout after waiting for ready fenceNicolai Hähnle2017-11-201-0/+5
* ddebug: fix the hang detection timeout calculationNicolai Hähnle2017-11-201-2/+2
* ddebug: fix use-after-free of streamout targetsNicolai Hähnle2017-11-201-1/+1
* gallium/u_threaded: properly initialize fence unflushed tokensNicolai Hähnle2017-11-201-2/+1
* u_threaded_gallium: remove synchronization in fence_server_syncNicolai Hähnle2017-11-203-3/+13
* radeonsi/gfx9: fix VM fault with fetched instance divisorsNicolai Hähnle2017-11-202-5/+12
* broadcom/vc5: Fix up integer texture handling.Eric Anholt2017-11-191-27/+28
* broadcom/vc5: Fix simulator assertion failures about color RT clears.Eric Anholt2017-11-191-2/+19
* freedreno/ir3: add texture gather supportRob Clark2017-11-182-2/+17
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