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* gallium/radeon: implement qbo for SO_OVERFLOW_PREDICATENicolai Hähnle2017-08-021-7/+37
| | | | | | v2: use R600_MAX_STREAMS instead of 4 (Marek) Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: implement basic parts of PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATENicolai Hähnle2017-08-021-25/+73
| | | | | | v2: use R600_MAX_STREAMS instead of 4 (Marek) Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: fix render predication by SO overflow predicateNicolai Hähnle2017-08-021-7/+6
| | | | | | | | | | The predication bits are "visible or no overflow" and "not visible or overflow", so we need to invert the check relative to the GL and Gallium interface semantics. Also, predication by the other streamout-related queries is not allowed. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: fix ARB_query_buffer_object conversion to booleanNicolai Hähnle2017-08-021-1/+2
| | | | | | | | | The issue here is that the immediate is treated as a 64-bit value, and fetching it does not work reliably with swizzles that are different from xy and zw. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* ddebug: handle get_query_result_resource as a GPU callNicolai Hähnle2017-08-023-32/+92
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: add util_{str,dump}_query_value_typeNicolai Hähnle2017-08-022-0/+31
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: add util_dump_query_type and use it in ddebugNicolai Hähnle2017-08-023-11/+13
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: rename util_dump_* to util_str_* for enum-to-string conversionNicolai Hähnle2017-08-027-103/+99
| | | | | | | This is mostly mechanical search-and-replace, plus touching up the macros in u_dump_defines.c manually a bit. Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE and corresponding capNicolai Hähnle2017-08-0221-2/+36
| | | | | | | | v2: rename cap to PIPE_CAP_QUERY_SO_OVERFLOW and be a bit more explicit in the documentation Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* virgl: add BPTC support.Dave Airlie2017-08-021-0/+3
| | | | | | | This just adds the guest checks for BPTC, the host renderer also needs code to support these. Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac: use ds_swizzle for derivs on si/cik.Dave Airlie2017-08-021-15/+1
| | | | | | | | | | | | This looks like it's supported since llvm 3.9 at least, so switch over radeonsi and radv to using it, -pro also uses this. We can now drop creating lds for these operations as the ds_swizzle operation doesn't actually write to lds at all. Acked-by: Marek Olšák <[email protected]> (stable requested due to fixing radv CIK conformance tests) Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
* st/dri: don't set PIPE_BIND_SHARED for privately-allocated renderbuffersMarek Olšák2017-08-011-2/+3
| | | | | | which are MSAA and depth/stencil buffers. Reviewed-by: Eric Anholt <[email protected]>
* radeonsi: don't print AMD twice in the renderer string with the marketing nameMarek Olšák2017-08-011-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: print CE IBs into ddebug reportsMarek Olšák2017-08-017-10/+41
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix printing vertex buffer descriptors into ddebug reportsMarek Olšák2017-08-012-0/+8
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't flush sL1 conditionally in WAIT_ON_CE_COUNTERMarek Olšák2017-08-011-3/+3
| | | | | | | | I don't know the condition for the flush, but we better turn this off. The sL1 flush is used when CE dumps stuff into a ring buffer and the ring buffer wraps. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set up HTILE in descriptors only when level 0 is accessibleMarek Olšák2017-08-011-1/+1
| | | | | | Compression isn't enabled with non-zero levels. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix various CLEAR_STATE issuesMarek Olšák2017-08-011-0/+22
| | | | | | | | | Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some registers") Bugzilla: https://bugs.freedesktop.org/101969 Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/targets: Fix d3dadapter9 build after xmlconfig move.Bas Nieuwenhuizen2017-07-311-0/+1
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Fixes: 601093f95dd "xmlconfig: move into src/util" Reviewed-by: Emil Velikov <[email protected]>
* xmlconfig: move into src/utilNicolai Hähnle2017-07-315-6/+5
| | | | | | | | v2: attempt to fix Android build (Emil) v3: add missing include path Reviewed-by: Marek Olšák <[email protected]> (v1)
* radeonsi: ensure that temp array allocas are in the entry blockNicolai Hähnle2017-07-311-1/+1
| | | | | | | | | Otherwise, code generation fails. This has become necessary since some shaders are wrapped in control flow. Fixes: 081ac6e5c6d2 ("radeonsi/gfx9: always wrap GS and TCS in an if-block (v2)") Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable R600_DEBUG=nir for vertex and fragment shadersNicolai Hähnle2017-07-313-1/+8
| | | | | | | | | Also, disable geometry and tessellation shaders. Mixing and matching NIR and TGSI shaders should work (and I've tested it for the VS/PS interface), but geometry and tessellation requires VS-as-ES/LS, which isn't implemented yet for NIR. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: VS as ES/LS are not yet supported with R600_DEBUG=nirNicolai Hähnle2017-07-311-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: lower uniforms to UBO loadsNicolai Hähnle2017-07-311-0/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: lower txp instructionsNicolai Hähnle2017-07-311-0/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/nir,radeonsi: add and use ac_shader_abi::frag_posNicolai Hähnle2017-07-311-4/+8
| | | | | | v2: update for LLVMValueRefs in ac_shader_abi Reviewed-by: Marek Olšák <[email protected]>
* ac/nir,radeonsi: add and use ac_shader_abi::{ancillary,sample_coverage}Nicolai Hähnle2017-07-311-2/+4
| | | | | | v2: update for LLVMValueRefs in ac_shader_abi Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: tweak next-shader assumptions when streamout is usedNicolai Hähnle2017-07-311-5/+11
| | | | | | VS with streamout is always a HW VS. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use new function ac_build_umin for edgeflag clampingNicolai Hähnle2017-07-311-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/nir,radeonsi: add ac_shader_abi::front_faceNicolai Hähnle2017-07-311-4/+12
| | | | | | v2: update for LLVMValueRefs in ac_shader_abi Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement and use ac_shader_abi::load_ssboNicolai Hähnle2017-07-312-11/+20
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: make get_indirect_index globally visibleNicolai Hähnle2017-07-312-10/+13
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: perform radeonsi-specific lowering and optimization passesNicolai Hähnle2017-07-311-0/+41
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: perform lowering of input/output driver locationsNicolai Hähnle2017-07-313-0/+29
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: add image descriptor loadingNicolai Hähnle2017-07-313-8/+32
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: add image and write parameter to ac_shader_abi::load_sampler_descNicolai Hähnle2017-07-311-1/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: set si_shader_context::num_{sampler,images}Nicolai Hähnle2017-07-311-0/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: implement ac_shader_abi::load_sampler_descNicolai Hähnle2017-07-313-20/+49
| | | | | | v2: remove enum desc_type from radeonsi (Marek) Reviewed-by: Marek Olšák <[email protected]>
* ac/nir,radeonsi: add ac_shader_abi::chip_classNicolai Hähnle2017-07-311-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: emit FS outputsNicolai Hähnle2017-07-311-10/+14
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: load FS inputsNicolai Hähnle2017-07-313-11/+52
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: load VS inputsNicolai Hähnle2017-07-313-2/+40
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/nir,radeonsi: add ac_shader_abi::load_uboNicolai Hähnle2017-07-311-0/+14
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac,radeonsi: add ac_shader_abi::emit_outputs for hardware VS shadersNicolai Hähnle2017-07-312-11/+33
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: pass si_shader_context to get_primitive_idNicolai Hähnle2017-07-311-6/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: translate NIR to LLVMNicolai Hähnle2017-07-313-3/+21
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: dump NIR instead of TGSI when appropriateNicolai Hähnle2017-07-311-1/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: bypass the shader cache for NIR shadersNicolai Hähnle2017-07-311-2/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: scan NIR shaders to obtain required infoNicolai Hähnle2017-07-315-6/+335
| | | | | | v2: set num_instruction to 2, i.e. 1 + END (Marek) Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_shader_selector::nirNicolai Hähnle2017-07-311-0/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
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