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Author
Age
Files
Lines
*
winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.
Mario Kleiner
2015-07-03
1
-3
/
+10
*
r600g: disable single-sample fast color clear due to hangs
Marek Olšák
2015-07-03
1
-1
/
+6
*
r600g,radeonsi: implement get_device_reset_status
Marek Olšák
2015-07-03
6
-4
/
+38
*
freedreno/ir3: don't be confused by eliminated indirects
Rob Clark
2015-07-03
2
-0
/
+14
*
freedreno/ir3: sched fixes for addr register usage
Rob Clark
2015-07-03
1
-12
/
+65
*
freedreno/ir3: fix indirects tracking
Rob Clark
2015-07-03
5
-10
/
+23
*
gallium/ttn: mark location specially in nir for color0-writes-all
Ilia Mirkin
2015-07-03
3
-1
/
+16
*
gallium/ttn: IN/OUT are only array if ArrayID != 0
Rob Clark
2015-07-03
1
-62
/
+81
*
tgsi: update docs for ArrayID usage
Rob Clark
2015-07-03
1
-0
/
+1
*
nv50/ir: don't emit src2 in immediate form
Ilia Mirkin
2015-07-02
1
-2
/
+2
*
nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capability
Alexandre Courbot
2015-07-01
1
-1
/
+2
*
nvc0: create screen fence objects with coherent attribute
Alexandre Courbot
2015-07-02
1
-2
/
+6
*
ilo: remove ilo_image_params
Chia-I Wu
2015-07-01
1
-75
/
+47
*
ilo: add image_init_gen6_transfer_layout()
Chia-I Wu
2015-07-01
1
-75
/
+37
*
ilo: add image_set_gen6_bo_size()
Chia-I Wu
2015-07-01
3
-118
/
+89
*
ilo: add image_set_gen6_{hiz,mcs}
Chia-I Wu
2015-07-01
1
-49
/
+61
*
ilo: add image_get_gen6_monolithic_size()
Chia-I Wu
2015-07-01
1
-67
/
+67
*
ilo: add image_get_gen6_lods()
Chia-I Wu
2015-07-01
1
-88
/
+148
*
ilo: add image_get_gen{6,7}_alignment()
Chia-I Wu
2015-07-01
1
-159
/
+177
*
ilo: add image_get_gen6_{hiz,mcs}_enable()
Chia-I Wu
2015-07-01
1
-101
/
+97
*
ilo: add image_get_gen6_tiling()
Chia-I Wu
2015-07-01
1
-132
/
+177
*
ilo: add image_get_gen6_layout()
Chia-I Wu
2015-07-01
1
-82
/
+107
*
nv50/ir: copy joinAt when splitting both before and after
Ilia Mirkin
2015-07-01
3
-0
/
+5
*
gallivm: add fp64 support. (v2.1)
Dave Airlie
2015-07-01
8
-31
/
+553
*
tgsi: add infer support for double opcodes.
Dave Airlie
2015-07-01
1
-0
/
+37
*
freedreno: use consistent version string format
Timothy Arceri
2015-07-01
1
-1
/
+1
*
nir/from_ssa: add a flag to not convert everything from SSA
Connor Abbott
2015-06-30
1
-1
/
+1
*
gallium/ttn: don't upset nir_validate w/ BRK's
Rob Clark
2015-06-30
1
-1
/
+1
*
gallium/ttn: add TXB2
Rob Clark
2015-06-30
1
-0
/
+11
*
gallium/ttn: partial fix for output arrays
Rob Clark
2015-06-30
1
-2
/
+4
*
freedreno/ir3: cache defining instruction
Rob Clark
2015-06-30
3
-69
/
+91
*
freedreno/ir3: fix RA issue with fanin
Rob Clark
2015-06-30
1
-5
/
+15
*
freedreno/ir3: add ir3_shader_disasm()
Rob Clark
2015-06-30
3
-120
/
+124
*
freedreno/a4xx: fix for sparse-samplers
Rob Clark
2015-06-30
1
-3
/
+7
*
freedreno/ir3: fix crash in fail path
Rob Clark
2015-06-30
3
-3
/
+12
*
freedreno/ir3: fix crash in RA
Rob Clark
2015-06-30
1
-2
/
+5
*
freedreno/ir3: fixes for indirect writes
Rob Clark
2015-06-30
3
-4
/
+12
*
freedreno/ir3: fix constlen in case of load_uniform_indirect
Rob Clark
2015-06-30
1
-0
/
+5
*
nv50/ir: fix emission of address reg in 3rd source
Ilia Mirkin
2015-06-30
1
-2
/
+6
*
nv30: align transfer stride to 64, required by blit, sifm transfer impls
Ilia Mirkin
2015-06-29
1
-2
/
+2
*
nv30: allow vertex state creation with 0 elements
Ilia Mirkin
2015-06-29
1
-2
/
+3
*
nv30: reset fragprog bufctx at bind time
Ilia Mirkin
2015-06-29
1
-1
/
+8
*
nv30: modernize fp upload logic
Ilia Mirkin
2015-06-29
1
-10
/
+14
*
nv30: provide a minimum map buffer alignment
Ilia Mirkin
2015-06-29
1
-1
/
+2
*
clover: implement CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE
Grigori Goronzy
2015-06-29
3
-1
/
+7
*
gallium: add PIPE_COMPUTE_CAP_SUBGROUP_SIZE
Grigori Goronzy
2015-06-29
6
-1
/
+42
*
nv30: avoid leaking blit fp/vp
Ilia Mirkin
2015-06-29
1
-0
/
+6
*
nv40: enable base vertex
Ilia Mirkin
2015-06-29
3
-4
/
+5
*
gallium/hud: prevent NULL pointer dereference with pipe_query functions
Samuel Pitoiset
2015-06-28
1
-6
/
+8
*
nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.
Mario Kleiner
2015-06-28
1
-1
/
+5
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