summaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Collapse)AuthorAgeFilesLines
* etnaviv: use NORMALIZE_SIGN_EXTENDChristian Gmeiner2019-11-291-1/+1
| | | | | | | | | | | | | | | | | | | The blob driver does something like this for all vertex formats: if (normalize) { if (OPENGL_ES30) val = VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_SIGN_EXTEND; else val = VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_ON; } else { val = VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF; } As there is no way to get to that information in gallium we always assume OPENGL_ES30. Reviewed-by: Jonathan Marek <[email protected]> Signed-off-by: Christian Gmeiner <[email protected]>
* etnaviv: fix integer vertex formatsChristian Gmeiner2019-11-291-24/+24
| | | | | Reviewed-by: Jonathan Marek <[email protected]> Signed-off-by: Christian Gmeiner <[email protected]>
* panfrost: Make sure we reset the damage region of RTs at flush timeBoris Brezillon2019-11-293-1/+23
| | | | | | | | | | | | | | | | | We must reset the damage info of our render targets here even though a damage reset normally happens when the DRI layer swaps buffers. That's because there can be implicit flushes the GL app is not aware of, and those might impact the damage region: if part of the damaged portion is drawn during those implicit flushes, you have to reload those areas before next draws are pushed, and since the driver can't easily know what's been modified by the draws it flushed, the easiest solution is to reload everything. Reported-by: Carsten Haitzler <[email protected]> Fixes: 65ae86b85422 ("panfrost: Add support for KHR_partial_update()") Cc: <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* gallium: Fix the ->set_damage_region() implementationBoris Brezillon2019-11-293-4/+35
| | | | | | | | | | | | | | BACK_LEFT attachment can be outdated when the user calls KHR_partial_update() (->lastStamp != ->texture_stamp), leading to a damage region update on the wrong pipe_resource object. Let's delay the ->set_damage_region() call until the attachments are updated when we're in that case. Reported-by: Carsten Haitzler <[email protected]> Fixes: 492ffbed63a2 ("st/dri2: Implement DRI2bufferDamageExtension") Cc: <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* zink: silence coverity errorErik Faye-Lund2019-11-291-1/+1
| | | | | | | | Coverity doesn't know that we always have coordinates if we have lod. To avoid annoying errors, let's just zero-initialize this. CoverityID: 1455202 Reviewed-by: Dave Airlie <[email protected]>
* zink: error-check right variableErik Faye-Lund2019-11-291-1/+1
| | | | | | | That's not the value we just allocated... CoverityID: 1455177 Reviewed-by: Dave Airlie <[email protected]>
* zink: avoid NULL-derefErik Faye-Lund2019-11-291-2/+1
| | | | | | | | Same story as the previous two commits; these functions dereference the memory they are pointed at. We can't do that. CoverityID: 1455180 Reviewed-by: Dave Airlie <[email protected]>
* zink: avoid NULL-derefErik Faye-Lund2019-11-291-2/+1
| | | | | | | | Similar to the previous commit, pipe_resource_reference also dereference the memory pointed at. Let's avoid it. CoverityID: 1455198 Reviewed-by: Dave Airlie <[email protected]>
* zink: avoid NULL-derefErik Faye-Lund2019-11-291-2/+1
| | | | | | | | | zink_render_pass_reference will dereference the memory 'dst' points at, which can't really go well. All we want to do here is to increase the reference-count, so let's use a different helper for that instead. CoverityID: 1455200 Reviewed-by: Dave Airlie <[email protected]>
* zink: handle calloc-failureErik Faye-Lund2019-11-291-0/+2
| | | | | | | | In case we fail to allocate the context, we should notice and fail gracefully. CoverityID: 1455193 Reviewed-by: Dave Airlie <[email protected]>
* zink: do not try to destroy NULL-fenceErik Faye-Lund2019-11-291-1/+1
| | | | | | | | destroy_fence doesn't handle NULL-pointers gracefully. So let's avoid hitting that code-path, by simply returning NULL early here instead. CoverityID: 1455179 Reviewed-by: Dave Airlie <[email protected]>
* zink: delete query rather than allocating a new oneErik Faye-Lund2019-11-291-1/+1
| | | | | | | | | | It seems I had some fat fingers when writing this function, and I accidentally ended up allocating a new query and immediately trying to delete an uninitialized pool instead of just deleting the pool of the query that was passed. CoverityID: 1455196 Reviewed-by: Dave Airlie <[email protected]>
* zink: fix crash when restoring sampler-statesErik Faye-Lund2019-11-293-1/+3
| | | | | | | | | | | | When I changed to heap-allocated sampler-objects, I missed the code-path that restores sampler-states after the blitter; it needs an array of pointers, not an array of VkSampler objects to behave. This fixes spec@arb_texture_cube_map@copyteximage for me. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: 5ea787950f6 ("zink: heap-allocate samplers objects") Reviewed-by: Dave Airlie <[email protected]>
* zink: reject invalid sample-countsErik Faye-Lund2019-11-291-0/+2
| | | | | | | | | Vulkan only allows power-of-two sample counts. We already kinda checked for this, but forgot to validate the result in the end. Let's check the result and error properly. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* zink: use true/false instead of TRUE/FALSEErik Faye-Lund2019-11-291-16/+16
| | | | Reviewed-by: Dave Airlie <[email protected]>
* panfrost: Fix gnu-empty-initializer build errors.Vinson Lee2019-11-283-5/+5
| | | | | | Fixes: a24d6fbae60c ("meson: Add -Werror=gnu-empty-initializer to MSVC compat args") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* winsys/amdgpu: avoid double simple_mtx_unlock()Jonathan Gray2019-11-281-1/+0
| | | | | | | | | | | | | | pthread_mutex_unlock() when unlocked is documented by posix as being undefined behaviour. On OpenBSD pthread_mutex_unlock() will call abort(3) if this happens. This occurs in amdgpu_winsys_create() after cb446dc0fa5c68f681108f4613560543aa4cf553 winsys/amdgpu: Add amdgpu_screen_winsys Signed-off-by: Jonathan Gray <[email protected]> Cc: 19.2 19.3 <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* llvmpipe: add initial nir supportDave Airlie2019-11-2810-20/+125
| | | | | | | | | | This adds the hooks between llvmpipe and the gallivm NIR code, for compute and fragment shaders. NIR support is hidden behind LP_DEBUG=nir for now until all the intergration issues are solved Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add swizzle support where one channel isn't defined.Dave Airlie2019-11-282-12/+35
| | | | | | | NIR doesn't always define all output channels relies on outputs being memset to 0 Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: add nir lowering passes for the draw pipe stages. (v2)Dave Airlie2019-11-287-27/+547
| | | | | | | | This transforms the NIR shaders like the TGSI transforms worked. v2: fix some nir info requirements, use 32-bit bools Acked-by: Roland Scheidegger <[email protected]>
* draw: add nir info gathering and building supportDave Airlie2019-11-285-26/+63
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add nir->llvm translation (v2)Dave Airlie2019-11-285-0/+3142
| | | | | | | | | This add the initial implementation of the NIR->LLVM conversion for llvmpipe NIR support. v2: lower bool to int32 in nir not llvm Acked-by: Roland Scheidegger <[email protected]>
* gallivm: add selection for non-32 bit typesDave Airlie2019-11-281-1/+8
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add cttz wrapperDave Airlie2019-11-282-0/+17
| | | | | | this will be used to write find_lsb support Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add popcount intrinsic wrapperDave Airlie2019-11-282-1/+15
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: nir->tgsi info convertor (v2)Dave Airlie2019-11-285-1/+816
| | | | | | | | | | | This is a port of the old radeonsi code to be used for llvmpipe NIR support. Once we remove TGSI support from llvmpipe (I can dream? :-), then we should be able to refine most of this down and remove it. v2: port to later radeonsi code for vertex inputs and sampler/io parsing. Acked-by: Roland Scheidegger <[email protected]>
* gallivm: split out the flow control ir to a common file.Dave Airlie2019-11-286-479/+599
| | | | | | We can share a bunch of flow control handling between NIR and TGSI. Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: enable SPIR-V and GL 4.6 for NIRMarek Olšák2019-11-271-6/+5
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/nir: support interface output types to fix SPIR-V xfb piglitsMarek Olšák2019-11-271-1/+1
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/nir: fix location_frac handling for TCS outputsMarek Olšák2019-11-271-1/+1
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/nir: don't rely on data.patch for tess factorsMarek Olšák2019-11-271-1/+4
| | | | | | GLCTS SPIR-V tests have this issue. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/nir: validate is_patch because SPIR-V doesn't set it for tess factorsMarek Olšák2019-11-271-10/+21
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: simplify get_tcs_tes_buffer_address_from_generic_indicesMarek Olšák2019-11-271-27/+19
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: simplify the interface of get_dw_address_from_generic_indicesMarek Olšák2019-11-271-29/+19
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/nir: implement subgroup system values for SPIR-VMarek Olšák2019-11-274-0/+11
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* driconf, glsl: Add a vs_position_always_invariant optionKenneth Graunke2019-11-273-0/+4
| | | | | | | | | | | | | | | | | | | | Many applications use multi-pass rendering and require their vertex shader position to be computed the same way each time. Optimizations may consider, say, fusing a multiply-add based on global usage of an expression in a shader. But a second shader with the same expression may have different code, causing that optimization to make the other choice the second time around. The correct solution is for applications to mark their VS outputs 'invariant', indicating they need multiple shaders to compute that output in the same manner. However, most applications fail to do so. So, we add a new driconf option - vs_position_always_invariant - which forces the gl_Position output in vertex shaders to be marked invariant. Fixes: 7025dbe794b ("nir: Skip emitting no-op movs from the builder.") Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* v3d: fix indirect BO allocation for uniformsIago Toral Quiroga2019-11-271-3/+8
| | | | | | | | | | | | | | | | | | | We were always ensuring a minimum size of 4 bytes for uniforms for the case where we don't have any, to account for hardware pre-fetching of the uniform stream, however, pre-fetching could also lead to to out of bounds reads when have read the last uniform in the stream, so we probably want to have the extra 4 bytes to prevent the kernel from observing invalid memory accesses when the uniform stream sits right at the end of a page. This seems to fix MMU exceptions reported with a Linux 5.4 kernel. Credit goes to Phil Elwell for identifying the problem and narrowing it down to memory accesses in the uniform stream. Reported-by: Phil Elwell <[email protected]> Tested-by: Phil Elwell <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/auxiliary: Fix uses of gnu struct = {} extensionDylan Baker2019-11-265-8/+8
| | | | | | | | | | Most of these will never actually be compiled by windows, but in the interest of being able to make using struct foo = {}; an error and avoiding breaking windows removing a handful of safe uses seems like a good trade off. Reviewed-by: Kristian H. Kristensen <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* iris: Disable VF cache partial address workaround on Gen11+Kenneth Graunke2019-11-262-0/+14
| | | | | | | | | | | | | | | The vertex cache uses the full 48-bit address on Gen11+. See the documentation for 3DSTATE_VERTEX_BUFFERS, which describes the workaround and lists it as pre-Icelake. Interestingly, the docs don't mention index buffers as needing a workaround at all. So either we've been overzealous, or the docs never got updated to record that. Which begs the question of whether the issue there was fixed, if there was one... Cuts 40% of the PIPE_CONTROLs from Civilization VI's benchmark; appears that it improves performance by about 1-2% on Icelake 8x8 (not frequency locked).
* freedreno: switch to layout helperRob Clark2019-11-2627-199/+190
| | | | | | | | | | | | The slices table and most of the other layout fields in the freedreno_resource moves into fdl_layout. v2: Changes by anholt to not have duplicate fields, which was introducing a surprising behavior change in resource layout (using the level_linear helper before the setup of the shadowed fields) Reviewed-by: Eric Anholt <[email protected]> Acked-by: Rob Clark <[email protected]>
* freedreno/a6xx: Log the tiling mode in resource layout debug.Eric Anholt2019-11-261-2/+2
| | | | | | | This was important for figuring out what went wrong with the layout refactor. Acked-by: Rob Clark <[email protected]>
* freedreno: Convert the slice struct to the new resource header.Eric Anholt2019-11-2623-71/+43
| | | | | | | | This gets the worst of the sed required for shared resource layout out of the way. The texture layout comment is dropped now that we're referencing the shared header, which has a more complete description. Acked-by: Rob Clark <[email protected]>
* freedreno: Introduce a fd_resource_tile_mode() helper.Eric Anholt2019-11-268-36/+24
| | | | | | | | Multiple places were doing the same thing to get the tile mode of a level, so refactor it out. This will make the shared resource helper transition cleaner. Acked-by: Rob Clark <[email protected]>
* freedreno: Introduce a fd_resource_layer_stride() helper.Eric Anholt2019-11-262-11/+15
| | | | | | | This factors out a bit of duplicated code, but will also make the shared resource layout transition process clearer. Acked-by: Rob Clark <[email protected]>
* freedreno: use rsc->slice accessor everywhereRob Clark2019-11-2614-45/+58
| | | | | | | This will make it easier to extract the slice table out into a layout helper. Acked-by: Rob Clark <[email protected]>
* etnaviv: support 3d/array/integer formats in texture descriptorsJonathan Marek2019-11-261-3/+19
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: blt: fix partial ZS clears with TSJonathan Marek2019-11-261-4/+7
| | | | | | | | If not all bits are cleared, then BLT needs to be given the current clear value and not the new one. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* r600: Disable eight bit three channel formatsGert Wollny2019-11-261-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 0899bf55 made some deqp-gles3 tests related to RGB8 PBOs fail on R600 because it exposed PIPE_FORMAT_R8G8B8_UNORM and R600 doesn't propely handle this. Disabling this format also for buffers fixes the issue. In addition, disabling also the related RGB8 integer formats for buffers fixes some deqp-gles3 tests: dEQP-GLES3.functional.texture.specification.teximage2d_pbo.rgb8ui_cube dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8i_2d dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8i_cube dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8ui_2d dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8ui_cube dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8i_2d_array dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8i_3d dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8ui_2d_array dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8ui_3d dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8i_2d_array dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8i_3d dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8ui_2d_array dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8ui_3d Fixes: 0899bf55 st/mesa: Map MESA_FORMAT_RGB_UNORM8 <-> PIPE_FORMAT_R8G8B8_UNORM Closes #2118 Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* iris: Update SURFACE_STATE addresses when setting sampler viewsKenneth Graunke2019-11-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | We may have replaced the backing storage for a texture buffer while it was unbound, at which point iris_rebind_buffer would not have caught it and updated it. We need to ensure that the current resource's address matches the one our SURFACE_STATE points at. If not, update addresses and re-upload the SURFACE_STATE. Shader images and buffers do not suffer from this problem because we re-stream the surface state on every set call, since there isn't a created CSO object for those with a saved SURFACE_STATE. Constant buffers are also currently re-streamed (we pitch the SURFACE_STATE on every set_constant_buffer call). Surfaces would need this treatment (as they're created CSOs) except that we never swap out their backing storage today (we only do it for buffers), so it's OK for now. Fixes misrendering in Unreal 4 demos (Elemental, Matinee Fight Scene). Huge thanks to Andrii Simiklit for tracking down the problem - it was quite difficult to find! Also fixes Andrii's new Piglit test for the bug, 'arb_texture_buffer_object-re-init'. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1365
* iris: Maintain CPU-side SURFACE_STATE copies for views and surfaces.Kenneth Graunke2019-11-252-55/+136
| | | | | | | | | | | | | | | | | | | | | | When replacing the backing storage for texture buffers, image buffers, and so on, we may need to update the "Surface Base Address" field in any corresponding SURFACE_STATE. This is easier to accomplish if we have a copy on the CPU - we can just compare the current field, update it, and re-upload. This patch adds a CPU-side copy to the new iris_surface_state wrapper struct, and reworks allocation and upload to fill things out on the CPU copy first, then upload that to the GPU when finished. This will be necessary to fix iris_invalidate_resource bugs shortly. Technically, we never replace the backing storage for pipe_surfaces (render targets), so we don't need to make this change there. However, it's nice to have surfaces, sampler views, and image views handled similarly. Plus, if we ever wanted to swap out backing storage for busy textures, we'd need this infrastructure. v2: Properly free memory (caught by Andrii Simiklit)
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 08:59:24 +0000