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* nvc0/ir: tess factors are now sysvals, adapt codegen to expect thatIlia Mirkin2015-07-236-11/+24
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* gallivm: Fix profile build.Jose Fonseca2015-07-231-1/+1
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* gallium/util: Stop bundling our snprintf implementation.Jose Fonseca2015-07-233-1485/+31
| | | | | | | | | | | Use MSVCRT functions instead. Their semantics are slightly different but they can be made to work as expected. Also, use the same code paths for both MSVCRT and MinGW. https://bugs.freedesktop.org/show_bug.cgi?id=91418 Reviewed-by: Brian Paul <[email protected]>
* gallivm: Add ifdefs so raw_debug_stream is only defined when usedTom Stellard2015-07-231-0/+2
| | | | | | | Its only use is to implement a custom version of LLVMDumpValue on some Windows and embedded platforms. Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: Don't use raw_debug_ostream for dissasemblingTom Stellard2015-07-231-14/+13
| | | | | | | | All LLVM API calls that require an ostream object have been removed from the disassemble() function, so we don't need to use this class to wrap _debug_printf() we can just call this function directly. Reviewed-by: Jose Fonseca <[email protected]>
* gk110/ir: fake BAR supportIlia Mirkin2015-07-231-0/+12
| | | | | | Makes things sorta work until we figure out the real way to do this. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: cleanup private enums that have graduated to galliumIlia Mirkin2015-07-232-7/+0
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: allow tess eval output loads to be CSE'dIlia Mirkin2015-07-231-0/+2
| | | | | | These only happen for gl_TessCoord which are constant. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add hazard for 2nd dim of vfetch/load indirect argumentIlia Mirkin2015-07-231-0/+2
| | | | | | | Apparently a multi-word load can potentially overwrite the indirect sources, so make sure that RA picks different registers for those. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: patch vertex count is stored in the upper bitsIlia Mirkin2015-07-231-0/+4
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* nvc0/ir: add support for reading outputs in tess control shadersIlia Mirkin2015-07-232-2/+18
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: set perPatch flag on load/stores to per-patch varyingsIlia Mirkin2015-07-231-2/+6
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: populate info structure based on new tess propertiesIlia Mirkin2015-07-231-0/+18
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: mark varyings as per-patch based on semantic nameIlia Mirkin2015-07-232-4/+16
| | | | | | Also add proper handling for PATCH semantics Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: TESSCOORD comes in as a sysval, not an inputIlia Mirkin2015-07-232-11/+10
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add handling for set_tess_state callbackIlia Mirkin2015-07-233-0/+34
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add support for setting patch vertices at draw timeIlia Mirkin2015-07-234-3/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: support MAX_SHADER_PATCH_VARYINGSIlia Mirkin2015-07-231-1/+2
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* nvc0: preliminary tess supportIlia Mirkin2015-07-2310-54/+86
| | | | | | | Uncomment the various functionality that was already there and add in obvious missing bits that parallel vp/gp/fp functionality. Signed-off-by: Ilia Mirkin <[email protected]>
* radeonsi: enable tessellation, update GL3.txt & release notesMarek Olšák2015-07-231-3/+11
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add scratch buffer support for tessellation shadersMarek Olšák2015-07-231-8/+28
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: update invariant registers for tessellationMarek Olšák2015-07-231-2/+6
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add assertions into draw_vbo and check tessellationMarek Olšák2015-07-231-1/+7
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set the rasterization primitive type for tessellationMarek Olšák2015-07-231-0/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set VGT_LS_HS_CONFIG for tessellationMarek Olšák2015-07-233-4/+28
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: update IA_MULTI_VGT_PARAM for tessellationMarek Olšák2015-07-231-3/+51
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add derived tessellation stateMarek Olšák2015-07-234-3/+146
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement a fixed-function tessellation control shader and its stateMarek Olšák2015-07-234-1/+68
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set up a ring buffer for tessellation factorsMarek Olšák2015-07-234-0/+42
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add tessellation shader statesMarek Olšák2015-07-233-13/+203
| | | | | | ls_rsrc# will be emitted as part of the derived tessellation state Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: update si_get_vs_info and si_get_vs_state for tessellationMarek Olšák2015-07-231-2/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add shader code generation for tessellationMarek Olšák2015-07-235-29/+851
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement TGSI_OPCODE_BARRIERMarek Olšák2015-07-231-0/+12
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: program VGT_SHADER_STAGES_EN for tessellationMarek Olšák2015-07-234-23/+45
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add translation of PATCH primitivesMarek Olšák2015-07-231-0/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for tessellation shader resources and samplersMarek Olšák2015-07-232-8/+37
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add code for creating, binding and destroying tessellation shadersMarek Olšák2015-07-233-0/+74
| | | | | | This doesn't do anything yet. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add debug flags for dumping tessellation shadersMarek Olšák2015-07-232-9/+17
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: rework how shader pointers to descriptors are setMarek Olšák2015-07-235-91/+156
| | | | | | | | | | | | | | | | | This is mainly needed for tessellation where a VS can be bound as VS, ES, or LS, and TES (tess. evaluationshader) can be bound as VS or ES or neither. Therefore we need the ability to move pointers to descriptors between shaders arbitrarily. The idea is that the context has a mapping from PIPE_SHADER_x to SPI_SHADER_USER_DATA_x. After a shader is enabled or disabled, si_shader_change_notify should be called to update this mapping accordingly. There is a dirty flag for each shader pointer, but only one emit function for all pointers in the whole context, whose code and logic is separated from descriptors. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: rename build_streamout_store -> build_tbuffer_store_dwordsMarek Olšák2015-07-231-12/+12
| | | | | | It will be reused later. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: separate primitive ID computationMarek Olšák2015-07-231-7/+20
| | | | | | Support for new shader stages will be added here. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move declaring streamout parameters to its own functionMarek Olšák2015-07-231-13/+23
| | | | | | It will be reused later. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: make ES2GS offset sgpr location dynamicMarek Olšák2015-07-232-6/+3
| | | | | | It will have a different location in the tessellation evaluation shader. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: expose emit_fetchMarek Olšák2015-07-232-19/+15
| | | | Radeonsi will use this.
* gallium/radeon: expose LLVM functions implementing emit_storeMarek Olšák2015-07-232-5/+13
| | | | | | | | emit_store will be reimplemented for tessellation control shader outputs where only radeon_llvm_saturate will be used, but radeonsi will want to fall back to radeon_llvm_emit_store for other register types. This exposes both functions.
* winsys/radeon: implement buffer_unmapMarek Olšák2015-07-232-6/+24
| | | | | | | This has been a no-op due to performance concerns. From now on, drivers should decide when they don't want to unmap, not the winsys. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: remove buffer_unmap calls that can potentially decrease perfMarek Olšák2015-07-237-26/+1
| | | | | | | | | | | | | buffer_unmap is currently a no-op on radeon and done correctly on amdgpu. I plan to fix it for radeon, but before that, all occurences of buffer_unmap that can negatively affect performance in the future must be removed. There are 2 reasons for removing buffer_unmap calls: - There is a likelihood that buffer_map will be called again, so we don't want to unmap yet. - The buffer is being released, which automatically unmaps it. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove switch statement in si_create_contextMarek Olšák2015-07-233-13/+7
| | | | | | and make si_init_config static Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't change pipe_resource in resource_copy_regionMarek Olšák2015-07-234-160/+110
| | | | | | | Copied from r600g. pipe_resource can be shared by multiple threads, so we shouldn't change it. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: upload shader rodata after updating scratch relocationsMarek Olšák2015-07-233-29/+29
| | | | | | Cc: 10.5 10.6 <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
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