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* freedreno/a5xx: enable a540Rob Clark2019-06-112-2/+14
* freedreno/a6xx: enable UBWC by defaultRob Clark2019-06-113-18/+3
* freedreno/a6xx: disallow UBWC for z24s8Rob Clark2019-06-111-1/+0
* freedreno/a6xx: use correct UBWC reg buildersRob Clark2019-06-112-11/+11
* freedreno/a6xx: disable UBWC for some formatsRob Clark2019-06-111-2/+0
* freedreno/a6xx: handle non-UWC-compatible image viewsRob Clark2019-06-115-1/+45
* freedreno/a6xx: handle non-UBWC-compatible texture viewsRob Clark2019-06-113-0/+23
* freedreno: add helper to uncompress UBWC resourceRob Clark2019-06-112-0/+37
* freedreno: handle images in rebind_resource()Rob Clark2019-06-111-0/+9
* freedreno: allow null discard box in shadow pathRob Clark2019-06-111-4/+10
* freedreno: swap UBWC state in shadow pathRob Clark2019-06-111-0/+4
* freedreno: add modifier param to fd_try_shadow_resource()Rob Clark2019-06-111-3/+5
* freedreno: correct modifier for UBWC buffersRob Clark2019-06-111-0/+3
* virgl: consider newly created resources idleChia-I Wu2019-06-111-6/+8
* virgl: make resource_wait/resource_is_busy cheaperChia-I Wu2019-06-112-0/+27
* virgl: add virgl_drm_{alloc,free,clear}_res_listChia-I Wu2019-06-111-17/+42
* virgl: do not cache external resourcesChia-I Wu2019-06-112-1/+10
* panfrost: Enable AFBC on depth/stencilAlyssa Rosenzweig2019-06-113-11/+10
* panfrost: Linear depth/stencil should be alignedAlyssa Rosenzweig2019-06-111-1/+2
* panfrost/midgard: Decode LOD/bias registersAlyssa Rosenzweig2019-06-112-5/+58
* panfrost/midgard: Decode texture offset register swizzleAlyssa Rosenzweig2019-06-112-11/+23
* panfrost/midgard/disasm: include textureGather()Alyssa Rosenzweig2019-06-112-5/+16
* panfrost/midgard: Support negative immediate offsetsAlyssa Rosenzweig2019-06-112-16/+20
* panfrost/midgard: Fix redunant mask redundancyAlyssa Rosenzweig2019-06-111-0/+5
* panfrost/midgard/disasm: Print LOD for texelFetchAlyssa Rosenzweig2019-06-111-0/+9
* panfrost/midgard: Identify the in_reg_full fieldAlyssa Rosenzweig2019-06-113-10/+3
* panfrost/midgard/disasm: Correctly dump bias/LODAlyssa Rosenzweig2019-06-112-16/+20
* panfrost/midgard/disasm: Cleanup texture op codeAlyssa Rosenzweig2019-06-111-3/+3
* panfrost/midgard/disasm: Add missing spaceAlyssa Rosenzweig2019-06-111-2/+2
* panfrost/midgard/disasm: LOD immediate/register selectAlyssa Rosenzweig2019-06-112-3/+13
* panfrost/midgard/disasm: Use texture op name bareAlyssa Rosenzweig2019-06-112-9/+7
* panfrost/midgard/disasm: Varying perspective dividesAlyssa Rosenzweig2019-06-112-4/+28
* panfrost/midgard: Add perspective division opcodesAlyssa Rosenzweig2019-06-112-0/+9
* panfrost/midgard: Print texture offsetsAlyssa Rosenzweig2019-06-112-36/+56
* panfrost/midgard: Expand texture to 4-channel swizzleAlyssa Rosenzweig2019-06-113-24/+7
* freedreno/a5xx: Fix indirect draw max_indices calculationEduardo Lima Mitev2019-06-111-2/+1
* iris: Bypass half-float pack/unpack lowering.Kenneth Graunke2019-06-101-0/+1
* panfrost: Ignore discards in dead branch analysisAlyssa Rosenzweig2019-06-101-0/+5
* panfrost/midgard: Disambiguate register modeAlyssa Rosenzweig2019-06-101-1/+11
* panfrost/midgard: Expose vec8/vec16 modesAlyssa Rosenzweig2019-06-101-236/+273
* panfrost/midgard: Add shifting int modifiersAlyssa Rosenzweig2019-06-102-18/+14
* panfrost/midgard: Add integer outmodsAlyssa Rosenzweig2019-06-103-25/+60
* panfrost/midgard: Note floating compares type convertAlyssa Rosenzweig2019-06-101-4/+4
* panfrost: Align linear renderable resourcesAlyssa Rosenzweig2019-06-101-3/+10
* panfrost: Fix stride check when mipmappingAlyssa Rosenzweig2019-06-101-7/+15
* panfrost: Refactor texture/sampler uploadAlyssa Rosenzweig2019-06-103-100/+124
* panfrost: Refactor blitting codeAlyssa Rosenzweig2019-06-105-79/+170
* panfrost: Refactor AFBC codeAlyssa Rosenzweig2019-06-104-64/+154
* panfrost: Move pan_screen() to pan_screen.hAlyssa Rosenzweig2019-06-102-6/+6
* panfrost: Always align strides to cache line (64)Alyssa Rosenzweig2019-06-101-1/+7
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