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* mesa: use util_strdup() macro in u_debug_symbol.cBrian Paul2017-10-231-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/util: replace gethostbyname() with getaddrinfo()Brian Paul2017-10-231-13/+22
| | | | | | | | | | Compiling with MSVC options /we4995 /we4996 (a subset of /sdl) generates a warning that the gethostbyname() function is deprecated in favor of getaddrinfo() or GetAddrInfoW(). Replace the call with getaddrinfo(). Untested. There are no callers to u_socket_connect() in Gallium. Reviewed-by: Nicolai Hähnle <[email protected]>
* meson: build imx driverDylan Baker2017-10-233-1/+36
| | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* meson: build etnaviv driver + winsysDylan Baker2017-10-234-1/+135
| | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* ac/nir: Only clamp shadow reference on radeonsi.Bas Nieuwenhuizen2017-10-231-0/+1
| | | | | | | | | | | | | | | | | | Vulkan CTS does not expect the value to be clamped (at least for D32), and it makes a differences even though depth is in [0,1], due to strict inequalities. I couldn't find anything in the Vulkan spec about this, but the test seemed to be copied from GL tests and the GL spec only specifies clamping for fixed point formats. Hence I expect radeonsi to run into this at some point as well, but given that they still have a usecase with the Z16->Z32 promotion, I'll leave that for someone else to clean up. This at least fixes radv dEQP-VK.texture.shadow.* on VI. Fixes: 0f9e32519bb 'ac/nir: clamp shadow texture comparison value on VI' Reviewed-by: Dave Airlie <[email protected]>
* broadcom/vc4: Fix aliasing issueStefan Schake2017-10-201-1/+1
| | | | | | | This was causing Android clang version 3.8.256229 to miscompile, presumably due to strict aliasing. Fixes: 14dc281c1332 ("vc4: Enforce one-uniform-per-instruction after optimization.")
* radeonsi: hardcode shader WAVE_LIMIT to the maximum valueAndres Rodriguez2017-10-211-7/+14
| | | | | | | | | | | | | This is part of a cooperative scheduling approach used by radv. All drivers in the stack must opt-in to resource arbitration, otherwise GL based apps will be able to ignore system priorities. We always hardcode the field to its maximum value, instead of attempting to calculate an approximate usage. In testing, there were no benefits to using anything other than the maximum. Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* broadcom/vc5: Fix pasteo that broke vertex texturing.Eric Anholt2017-10-201-1/+1
| | | | | We weren't ever filling in the texture state record, so we'd dereference NULL from the shader.
* broadcom/vc5: Move default attribute value setup to the CSO and fix them.Eric Anholt2017-10-203-29/+23
| | | | | | | | | I was generating some stub values to bring the driver up, but fill them in properly now. We now set 1.0 or 1u as appropriate, and thanks to being in their own BO it fixes piglit failures on the 7268 (where our 4-byte alignment was insufficient). Fixes const-packHalf2x16.shader_test
* broadcom/vc5: Move most of the shader state attribute record to the CSO.Eric Anholt2017-10-204-65/+90
| | | | | This should reduce our draw-time overhead, and puts the code where it should go long term.
* broadcom/vc5: Fix build failure frm nir_shader::stage removal.Eric Anholt2017-10-201-4/+4
| | | | Fixes: 59fb59ad54d3 ("nir: Get rid of nir_shader::stage")
* nir: Get rid of nir_shader::stageJason Ekstrand2017-10-205-17/+17
| | | | | | | | It's redundant with nir_shader::info::stage. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* etnaviv: fix implicit conversion warningChristian Gmeiner2017-10-202-2/+2
| | | | | | | Galliums query_type used in APIs is unsigned. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: enable occlusion query if GPU supports itChristian Gmeiner2017-10-201-1/+2
| | | | | Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: add support for occlusion queriesChristian Gmeiner2017-10-201-0/+78
| | | | | | | | | | | | | | Passes most occlusion query piglits. The following piglits are broken: - spec@arb_occlusion_query@occlusion_query_meta_fragments - spec@arb_occlusion_query@occlusion_query_meta_save - spec@arb_occlusion_query2@render v1 -> v2: - use one sample provider for all occlusion queries tyes - add comment about 'magic' value 0x1DF5E76 Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: add basic infrastructure for hw queriesChristian Gmeiner2017-10-206-0/+292
| | | | | | | | | | No hardware query is supported yet. v1 -> v2 - removed query_type from strcut etna_hw_sample_provider Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: update headers from rnndbChristian Gmeiner2017-10-205-89/+622
| | | | | | | Update to etna_viv commit 6c9c706. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* egl,dri: Propagate context priority hint to driver->CreateContextChris Wilson2017-10-202-0/+2
| | | | | | | | | | | | | | | | | | | | Jump through the layers of abstraction between egl and dri in order to feed the context priority attribute through to the backend. This requires us to read the value from the base _egl_context, convert it to a DRI attribute, parse it again in the generic context creator before passing it to the driver as a function parameter. In order to not require us to pass back the actual value of the context priority after creation, we impose that drivers should report the available set of priorities during screen setup (and then they may chose to fail if given an invalid value as that should have been checked at the user boundary.) Signed-off-by: Chris Wilson <[email protected]> Acked-by: Ben Widawsky <[email protected]> # i915/i965 Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* swr: Rework scratch space allocationGeorge Kyriazis2017-10-192-30/+23
| | | | | | | | | | | | | | | | | Remove allocation of > 2kbyte buffers into context memory in swr_copy_to_scatch_space() (which is used to copy small vertex/index buffers and shader constants to a scratch space to be used by the upcoming draw.) Large shader constant allocations need to be done in the circular scratch buffer instead of context memory, because their values persist across render calls. Also lower SCRATCH_SINGLE_ALLOCATION_LIMIT to 8k, since allocations of larger buffers will get too large for the circular scratch space. Fixes render issues with CEI Ensight. Reviewed-by: Bruce Cherniak <[email protected]>
* meson: don't build gallium dri target if gallium is disabledDylan Baker2017-10-191-1/+1
| | | | | | | | | | | | Otherwise -Dgallium-drivers= will cause libmesa_gallium to be built and the megadriver install script to attempt to install drivers without any actual drivers being built. fixes: 66f97f6640f5316b36177fd1053f0027eb6ec6cc ("meson: build radeonsi") Reported-by: Rafael Antognolli <[email protected]> Signed-off-by: Dylan Baker <[email protected]> Tested-by: Rafael Antognolli <[email protected]> Reviewed-by: Lyude Paul <[email protected]>
* swr: knob overrides for Intel Xeon PhiTim Rowley2017-10-195-1/+37
| | | | | | | | Architecture benefits from having more threads/work outstanding. Patch by Jan Zielinski. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add api to override draws in flightTim Rowley2017-10-194-19/+31
| | | | | | | | Allow draws in flight to be overridden via SWR_CREATECONTEXT_INFO. Patch by Jan Zielinski. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Widen fetch shader to SIMD16 (disabled for now)Tim Rowley2017-10-191-13/+428
| | | | | | | Refactored the gather operation to process 16 elements at a time via paired SIMD8 operations. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Change DS memory allocationTim Rowley2017-10-192-2/+3
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix indentationTim Rowley2017-10-191-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Miscellaneous viewport array code changesTim Rowley2017-10-195-38/+71
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Minor changes for os-xTim Rowley2017-10-191-2/+4
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: add more exceptions to tgsi_util_get_inst_usage_maskTim Rowley2017-10-191-0/+12
| | | | | | | | | | | | | A number of double/int64 operations don't have matching read and write usage masks, which the fallthrough case of tgsi_util_get_inst_usage_mask assumes for componentwise tagged instructions. No regressions in llvmpipe piglit; fixes a large number of swr regressions. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* tgsi: fix tgsi_util_get_inst_usage_maskRoland Scheidegger2017-10-191-6/+6
| | | | | | | | The logic for handling shadow coords was completely broken. Fixes be3ab867bd444594f9d9e0f8e59d305d15769afd. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103265 Reviewed-by: Marek Olšák <[email protected]>
* st/osmesa: include u_inlines.h for pipe_resource_referenceMichel Dänzer2017-10-181-0/+1
| | | | | | | | | Fixes build failure due to unresolved symbol. Fixes: 7561da367bae "st/mesa: Initialize textures array in st_framebuffer_validate" Trivial.
* st/mesa: Initialize textures array in st_framebuffer_validateMichel Dänzer2017-10-185-12/+5
| | | | | | | | | | | | | | | | And just reference pipe_resources to it in the validate callbacks. Avoids pipe_resource leaks when st_framebuffer_validate ends up calling the validate callback multiple times, e.g. when a window is resized. v2: * Use generic stable tag instead of Fixes: tag, since the problem could already happen before the commit referenced in v1 (Thomas Hellstrom) * Use memset to initialize the array on the stack instead of allocating the array with os_calloc. Cc: [email protected] Reviewed-by: Thomas Hellstrom <[email protected]>
* llvmpipe: handle shader sample mask outputRoland Scheidegger2017-10-181-2/+24
| | | | | | | | | This probably isn't all that useful for GL, but there are apis where sample_mask is a valid output even without msaa. Just discard the pixel if the sample_mask doesn't include the bit for sample 0. Reviewed-by: Brian Paul <[email protected]>
* meson: Add support for the vc5 driver.Eric Anholt2017-10-174-2/+111
| | | | | | | v2: Default vc5 to off, since it requires the simulator currently. Add missing dep on the XML generation from libbroadcom_vc5. Reviewed-by: Dylan Baker <[email protected]> (v1)
* meson: Add support for the pl111 driver.Eric Anholt2017-10-173-1/+38
| | | | Reviewed-by: Dylan Baker <[email protected]>
* meson: Add support for the vc4 driver.Eric Anholt2017-10-174-2/+146
| | | | Reviewed-by: Dylan Baker <[email protected]>
* radeonsi: if there's just const buffer 0, set it in place of CONST/SSBO pointerMarek Olšák2017-10-174-13/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SI_SGPR_CONST_AND_SHADER_BUFFERS now contains the pointer to const buffer 0 if there is no other buffer there. Benefits: - there is no constbuf descriptor upload and shader load It's assumed that all constant addresses are within bounds. Non-constant addresses are clamped against the last declared CONST variable. This only works if the state tracker ensures the bound constant buffer matches what the shader needs. Once we get 32-bit pointers, we can only do this for user constant buffers where the driver is in charge of the upload so that it can guarantee a 32-bit address. The real performance benefit might not be measurable. These apps get 100% theoretical benefit in all shaders (except where noted): - antichamber - barman arkham origins - borderlands 2 - borderlands pre-sequel - brutal legend - civilization BE - CS:GO - deadcore - dota 2 -- most shaders - europa universalis - grid autosport -- most shaders - left 4 dead 2 - legend of grimrock - life is strange - payday 2 - portal - rocket league - serious sam 3 bfe - talos principle - team fortress 2 - thea - unigine heaven - unigine valley -- also sanctuary and tropics - wasteland 2 - xcom: enemy unknown & enemy within - tesseract - unity (engine) Changed stats only: SGPRS: 2059998 -> 2086238 (1.27 %) VGPRS: 1626888 -> 1626904 (0.00 %) Spilled SGPRs: 7902 -> 7865 (-0.47 %) Code Size: 60924520 -> 60982660 (0.10 %) bytes Max Waves: 374539 -> 374526 (-0.00 %) Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: clean up ac_build_indexed_load function interfacesMarek Olšák2017-10-172-19/+19
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: handle 64-bit loads earlier in fetch_constantMarek Olšák2017-10-171-16/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add si_descriptors::gpu_address and remove buffer_offsetMarek Olšák2017-10-173-14/+18
| | | | | | This allows us to change the pointer arbitrarily. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: unify code for extracting a buffer address from a descriptorMarek Olšák2017-10-171-4/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove atom parameter from si_upload_descriptorsMarek Olšák2017-10-171-8/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pack si_descriptors better againMarek Olšák2017-10-171-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: emit dirty consecutive pointers in one SET_SH_REG packetMarek Olšák2017-10-171-27/+39
| | | | | | IB size: -1.6% Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: split si_emit_shader_pointerMarek Olšák2017-10-171-11/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: generalize the SI_VS_SHADER_POINTER_MASK macroMarek Olšák2017-10-173-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: use SPI_SHADER_USER_DATA_COMMONMarek Olšák2017-10-171-13/+13
| | | | | | IB size: -0.4% Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: move RW_BUFFERS from s[0:1] to s[8:9] for HS and GSMarek Olšák2017-10-172-39/+16
| | | | | | | Let's use the same user data SGPRs in all stages. (for SPI_SHADER_USER_DATA_COMMON_0) Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add GFX-IB-size query to the HUDMarek Olšák2017-10-177-0/+11
| | | | | | It shows the sum of all IBs per frame. Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: disable CPU caching for GFX & SDMA IBsMarek Olšák2017-10-171-4/+9
| | | | | | This should decrease IB fetch latency. Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: don't do read-modify-write on command buffersMarek Olšák2017-10-172-4/+16
| | | | | | i.e. don't use |= Reviewed-by: Nicolai Hähnle <[email protected]>
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