| Commit message (Collapse) | Author | Age | Files | Lines |
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Because u_blit couldn't sample a 1D, 3D, CUBE and ARRAY texture, we created
a 2D texture holding a copy of one slice of the source texture (even for 1D).
Let's just do it right.
Reviewed-by: Alex Deucher <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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This doesn't seem to be used by anything yet, but better safe than sorry.
Reviewed-by: Alex Deucher <[email protected]>
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This fixes stencil buffer write transfers on r600g.
Reviewed-by: Alex Deucher <[email protected]>
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used for stencil sampler views.
Reviewed-by: Alex Deucher <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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We're going to extend this to support multi-plane buffers, so pass this
to the driver so it can access the details.
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The code for growing the memory pool (which is used for storing all of
the global buffers) wasn't working. There seem to be two separate issues
with the memory pool code. The first was the way it was growing the pool.
When the memory pool needed more space, it would:
1. Copy the data from the memory pool's backing texture to system memory.
2. Delete the memory pool's texture
3. Create a bigger backing texture for the memory pool.
4. Copy the data from system memory into the bigger texture.
The copy operations didn't seem to be working, and I suspect that since
they were using fragment shaders to do the copy, that there might have
been a problem with the mixing of compute and 3D state.
The other issue is that the size of 1D textures is limited, and I was
having trouble getting 2D textures to work.
I think these problems will be easier to solve once more code is shared
between 3D and compute, which is why I decided to disable it for now
rather than continue searching for a fix.
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The original strategy for handling floating point loads, which was to
lower (f32 load) to (f32 bitcast (i32 load)) wasn't really working. The
main problem was that the DAG legalizer couldn't handle replacing a node
with two results (load) with a node with only one result (bitcast).
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The IMM bit is already being set in SICodeEmitter.
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Use r600_resource_texture::flished_depth_texture for GPU access, and
allocate it in the VRAM. For transfers we'll allocate texture in the GTT
and store it in the r600_transfer::staging.
Improves performance when flushed depth texture is frequently used by the
GPU, e.g. in Lightsmark (~30%)
Signed-off-by: Vadim Girlin <[email protected]>
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the query type is already documented
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PIPE_QUERY_TIMESTAMP is already implemented and working.
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This fixes a segfault in r600_screen_create() introduced by
eb065f5d9d1159af3a88a64a7606c9b6d67dc3
Reported by tilman on irc.
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This the first step towards being able to use evergreen_cb to bind RATs.
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This function is used when dispatching compute shader in order to avoid
mixing compute and 3D registers in the context's dirty list. This
allows the compute code to resuse 3D functions like evergreen_cb, which
return a struct r600_pipe_state and still have control over when and how
the register writes are emitted.
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This allows the shader type bit to be set in the pm4 header when
emitting registers for compute shaders.
Reviewed-by: Marek Olšák <[email protected]>
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The start_compute_cs atom initializes some config and context registers
to the values needed for running compute shaders. When a compute shader
is dispatched, this atom is emitted after the start_cs_cmd atom, which
initializes registers that are common to both 3D and compute.
Reviewed-by: Marek Olšák <[email protected]>
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Some packets require the shader type bit (bit 1) to be set when
used for compute shaders. The pkt_flag will be initialized to
RADEON_CP_PACKET3_COMPUTE_MODE for any struct r600_command_buffer used
for dispatching compute shaders and it will be or'd against the result of
the PKT3 macro when adding a new packet to a struct r600_command buffer.
Reviewed-by: Marek Olšák <[email protected]>
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No lockups here.
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underlying pipe driver.
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stderr is not visible on windows.
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Let galahad warnings be true warnings.
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