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* st/dri: Add option to control exposure of 10 bpc color configs.Mario Kleiner2018-01-032-0/+9
* st/dri: Add support for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-1/+14
* st/dri: Support texture_from_pixmap for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-0/+3
* st/dri2: Add buffer handling for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-0/+13
* st/dri2: Add format translations for BGR[A/X]1010102 formats.Mario Kleiner2018-01-031-0/+28
* swr/rast: fix MemoryBuffer build break for llvm-6Tim Rowley2018-01-031-0/+4
* etnaviv: disable in-place resolve for non-supertiled surfacesLucas Stach2018-01-011-0/+1
* nv50/ir: Fix unused var warnings in release buildRhys Kidd2017-12-292-2/+4
* nvc0: Fix unused var warnings in release buildRhys Kidd2017-12-291-3/+4
* nv50: Fix unused var warning in release buildRhys Kidd2017-12-291-1/+2
* r600: fix textureSize queries with tbosRoland Scheidegger2017-12-302-24/+33
* r600: kill off native_integer shader ctx flagRoland Scheidegger2017-12-301-18/+0
* svga: update SVGA_NEW_ flags for updating sampler stateBrian Paul2017-12-281-3/+4
* svga: whitespace, formatting fixes in svga_state_tss.cBrian Paul2017-12-281-34/+21
* svga: check for null fs pointer in update_samplers()Brian Paul2017-12-281-1/+1
* svga: move variant->fs_shadow_compare_units assignmentBrian Paul2017-12-271-2/+2
* radeonsi: make use of ac_init_exec_full_mask()Samuel Pitoiset2017-12-271-11/+3
* svga: use tgsi_util_get_shadow_ref_src_index() in a couple placeBrian Paul2017-12-261-22/+7
* tgsi: improve comment on tgsi_util_get_shadow_ref_src_index()Brian Paul2017-12-261-2/+6
* svga: fix TGSI_TEXTURE_SHADOW1D coordinate selectionBrian Paul2017-12-261-3/+1
* svga: fix shadow comparison failuresBrian Paul2017-12-265-36/+78
* util: add trivial comment on u_upload_create()Brian Paul2017-12-261-0/+1
* r600: fix atomic counter index mode getting emitted on pre-caymanDave Airlie2017-12-271-1/+1
* radv/radeonsi: set dcc min uncompressed properly for APUs.Dave Airlie2017-12-271-0/+9
* amd/common/radv/radeonsi: use register defines for dcc block sizes.Dave Airlie2017-12-271-3/+3
* radeonsi: don't use fast color clear for small images even on APUsMarek Olšák2017-12-251-5/+4
* radeonsi: set PNT_SPRITE_ENA = point_quad_rasterizationMarek Olšák2017-12-251-1/+1
* gallium/util: add util_num_layers helperMarek Olšák2017-12-257-15/+21
* freedreno: set missing internal_format when importing textureIlia Mirkin2017-12-221-0/+1
* amd/common: add ac_export_mrt_z() helperSamuel Pitoiset2017-12-221-60/+1
* amd/common: pass the family to ac_llvm_context_init()Samuel Pitoiset2017-12-221-1/+2
* gm107/ir: use lane 0 for manual textureGrad handlingIlia Mirkin2017-12-221-21/+34
* st/dri: allow direct YUYV importLucas Stach2017-12-201-0/+7
* nvc0/ir: change textureGrad to always use lane 0 as the tex originIlia Mirkin2017-12-191-14/+46
* broadcom/vc5: Add missing setting of the UIF XOR disable flag in textures.Eric Anholt2017-12-191-0/+3
* broadcom/vc5: Clean up the comment and code around level 0 UIF.Eric Anholt2017-12-191-14/+10
* broadcom/vc5: Simplify the tiling calculations.Eric Anholt2017-12-191-49/+11
* broadcom/vc5: Return the depth in all components of depth textures.Eric Anholt2017-12-191-6/+6
* broadcom/vc5: Enable decompressing RGTC for desktop GL support.Eric Anholt2017-12-191-1/+1
* broadcom/vc5: Use u_transfer_helper for MSAA mappings.Eric Anholt2017-12-192-98/+6
* broadcom/vc5: Start adding support for rendering to Z32F_S8X24_UINT.Eric Anholt2017-12-193-5/+94
* freedreno: add debug flag to force high priority contextRob Clark2017-12-193-1/+5
* freedreno: context priority supportRob Clark2017-12-193-2/+20
* gallium: plumb context priority through to driverRob Clark2017-12-1921-2/+66
* freedreno/ir3: handle VTXID_BASE for indirect drawsRob Clark2017-12-191-2/+41
* freedreno/ir3: add ctx->mem_to_mem()Rob Clark2017-12-194-14/+49
* freedreno/a5xx: use vertex_id_zero_baseRob Clark2017-12-192-20/+1
* r600: clear compressed flags in image state on unbind.Dave Airlie2017-12-191-0/+2
* swr: Account for index_bias in offsetsGeorge Kyriazis2017-12-181-3/+3
* r600: only reported tgsi ir compute support on evergreen+Dave Airlie2017-12-181-1/+3
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