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* iris: Sweep the NIR in iris_create_uncompiled_shader().Kenneth Graunke2019-06-071-0/+2
* v3d: don't emit point coordinates varyings if the FS doesn't read themIago Toral Quiroga2019-06-071-0/+5
* tests/graw: use C99 print conversion specifier for 32 bit buildsMark Janes2019-06-061-1/+2
* panfrost/midgard: Fix crash with unused SSA valuesAlyssa Rosenzweig2019-06-061-0/+4
* panfrost: Report sRGB colorspace as not supportedBoris Brezillon2019-06-061-0/+4
* radeonsi: Don't force dcc disable for loadsConnor Abbott2019-06-062-13/+0
* virgl: Enable CAP_CLIP_HALFZ if host supports itGert Wollny2019-06-062-1/+3
* svga: Remove unnecessary check for the pre flush bit for setting vertex buffersCharmaine Lee2019-06-061-4/+4
* winsys/svga/drm: Fix 32-bit RPCI send messageDeepak Rawat2019-06-061-12/+23
* lima/ppir: add missing handling of min/max ops for vec4 add slotVasily Khoruzhick2019-06-061-0/+6
* lima/ppir: fix crash when program uses no registers at allVasily Khoruzhick2019-06-061-0/+4
* radeonsi: Enable NIR's lower_fmod option.Kenneth Graunke2019-06-051-0/+1
* vc4: Enable NIR's lower_fmod option.Kenneth Graunke2019-06-051-0/+1
* nir: Combine lower_fmod16/32 back into a single lower_fmod.Kenneth Graunke2019-06-053-3/+3
* panfrost: Switch to nir_lower_doubles instead of lower_fmod64.Kenneth Graunke2019-06-051-1/+2
* nouveau: Use nir_lower_doubles instead of lower_fmod64 on nvc0.Kenneth Graunke2019-06-051-2/+1
* gallium: Drop lower_fmod64 from drivers that don't support doubles.Kenneth Graunke2019-06-051-1/+0
* panfrost/midgard: Verify SSA claims when pipeliningAlyssa Rosenzweig2019-06-053-0/+24
* panfrost/midgard: Don't assign var locations ourselvesAlyssa Rosenzweig2019-06-052-434/+0
* panfrost: Reload framebuffer contents if there's no clearTomeu Vizoso2019-06-054-311/+88
* panfrost: Don't flip scanoutAlyssa Rosenzweig2019-06-059-82/+47
* st/nine: Use tgsi_to_nir when preferred IR is NIR.Timur Kristóf2019-06-054-6/+135
* intel/nir: Stop returning the shader from helpersJason Ekstrand2019-06-051-1/+1
* iris: Only recompile CS when neededCaio Marcelo de Oliveira Filho2019-06-051-1/+1
* freedreno/a6xx: Use VALIDREG in next_regid() helperKristian H. Kristensen2019-06-051-6/+6
* freedreno/a6xx: Remove dead code from a5xxKristian H. Kristensen2019-06-051-10/+0
* panfrost/midgard: Always break up fragment writeoutAlyssa Rosenzweig2019-06-051-68/+21
* panfrost/midgard: Fix cubemap regressionAlyssa Rosenzweig2019-06-051-2/+9
* winsys/drm: Fix out of scope variable usageDeepak Rawat2019-06-021-12/+13
* panfrost/midgard: Lower integer divisionAlyssa Rosenzweig2019-06-052-144/+1
* panfrost/midgard: Fix 1-arg ALU memory corruptionAlyssa Rosenzweig2019-06-051-1/+2
* panfrost/midgard: Add a bunch of new ALU opsAlyssa Rosenzweig2019-06-053-4/+32
* swr: fix support for GL_ARB_copy_image extensionKrzysztof Raszkowski2019-06-051-1/+16
* build: Build etnaviv drmGuido Günther2019-06-052-7/+14
* etnaviv: gallium: Use internal etnaviv_drmif.hGuido Günther2019-06-054-4/+4
* etnaviv: untabifyGuido Günther2019-06-052-4/+4
* panfrost: bifrost: Fix format string in disassemblerTomeu Vizoso2019-06-051-1/+1
* iris: Free the buffer when reading from the disk cache.Kenneth Graunke2019-06-041-3/+8
* panfrost/midgard: Don't promote non-SSA to pipeline registersAlyssa Rosenzweig2019-06-051-1/+3
* freedreno: Drop invalid scissor optimization.Eric Anholt2019-06-041-7/+0
* virgl: resolve to correct level during texture readChia-I Wu2019-06-041-2/+2
* virgl: fix texture resolving with compressed formatsChia-I Wu2019-06-041-12/+17
* freedreno: Add printf pattern string.Bas Nieuwenhuizen2019-06-041-1/+1
* Revert "vl: Enable DRM by default."Bas Nieuwenhuizen2019-06-042-2/+2
* panfrost/midgard: .pos propagationAlyssa Rosenzweig2019-06-041-8/+72
* panfrost/midgard: Cleanup copy propagationAlyssa Rosenzweig2019-06-041-11/+4
* panfrost/midgard: Implement "pipeline register" prepassAlyssa Rosenzweig2019-06-044-2/+96
* panfrost/midgard: Helpers for pipelineAlyssa Rosenzweig2019-06-045-9/+79
* panfrost/midgard: Refactor schedule/emit pipelineAlyssa Rosenzweig2019-06-046-707/+744
* panfrost/midgard: Cleanup RA (stylistic changes)Alyssa Rosenzweig2019-06-041-16/+30
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