| Commit message (Collapse) | Author | Age | Files | Lines |
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By leaving the compiled shader in the context's stage state, the next
compile of a new FS would look in the old compiled FS for figuring out
whether to set various dirty flags for the VS compile. Clear out the
pointer when deleting the program, and make sure that we always mark the
state as dirty if the previous program had been lost. Fixes valgrind
warnings on glsl-max-varyings.
Fixes: 2350569a78c6 ("vc4: Avoid VS shader recompiles by keeping a set of FS inputs seen so far.")
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Even if we're not clearing color, the blitter has started dereferencing
the color value.
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The blitter will bind just the depth buffer, which flushes the current job
if we had both a color and depth/stencil. If the clear was doing partial
depth/stencil (quad-based) and color (tile-based), we'd go on to try to
set up the rest of the tile clear in the now flushed job.
Instead, move the partial clear up before we start setting up the job for
the current FBO state, and re-fetch the job if we're continuing on to a
tile-based clear. Fixes valgrind failures in fbo-depthtex.
Fixes: 9421a6065c4e ("vc4: Fix fallback to quad clears of depth in GLX.")
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I was trying to continue the hash table loop, not the inner loop. This
tended to work out, because we would have *just* freed the job struct.
Fixes some valgrind failures in fbo-depthtex.
Fixes: f597ac396640 ("vc4: Implement job shuffling")
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Only one of the three checks for dim was updated, so we would try to set a
UBO buffer index source value on a nir_load_uniform, and wouldn't actually
declare non-UBO uniforms.
Fixes: 37dd8e8dee1d ("gallium: all drivers should accept two-dimensional constant buffer indexing")
Tested-by: Derek Foreman <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Fixes: 3f6b3d9db ("gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE")
Reported-by: Jan Vesely <[email protected]>
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Fixes build issues with llvm-3.6
Fixes: 3115687f9b9830417c408228db2bc679e346bba6 (clover: Fix build after
LLVM r313390)
Signed-off-by: Jan Vesely <[email protected]>
Tested-by: Gert Wollny <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
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v2: PIPE_CAP_HALFS -> PIPE_SHADER_CAP_FP16
has_halfs -> has_halves
Signed-off-by: Jan Vesely <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
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Denotes native half precision float operations capability
v2: PIPE_CAP_HALFS -> PIPE_SHADER_CAP_FP16
fix indentation
Signed-off-by: Jan Vesely <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Fixes: 3f6b3d9db ("gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE")
Signed-off-by: Benedikt Schemmer <[email protected]>
Previously-pointed-out-by: Ilia Mirkin <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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We do not enable this by default for additive blending, since it slightly
breaks OpenGL invariance guarantees due to non-determinism.
Still, there may be some applications can benefit from white-listing
via the radeonsi_commutative_blend_add drirc setting without any real
visible artifacts.
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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This option enables a performance optimization where typical non-blending
draws with depth buffer may be rasterized out-of-order (on VI+, multi-SE
chips).
This optimization can lead to incorrect results when an applications
renders multiple objects with the same Z value at the same pixel, so we
will never enable it by default. But there may be applications that could
benefit from white-listing.
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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This does not take commutative blending into account yet.
R600_DEBUG=nooutoforder disables it.
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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The callee can derive the current enable state itself.
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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To be able to properly distinguish between GL_ANY_SAMPLES_PASSED
and GL_ANY_SAMPLES_PASSED_CONSERVATIVE.
This patch goes through all drivers, having them treat the two
query types identically, except:
1. radeon incorrectly enabled conservative mode on
PIPE_QUERY_OCCLUSION_PREDICATE. We now do it correctly, only
on PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE.
2. st/mesa uses the new query type.
Fixes dEQP-GLES31.functional.fbo.no_attachments.*
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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The NIR-to-LLVM pass already does this; now the same fix covers
radeonsi as well.
Fixes various tests of
dEQP-GLES31.functional.texture.filtering.cube_array.combinations.*
Cc: [email protected]
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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This is the same workaround that radv already applied in commit
3ece76f03dc0 ("radv/ac: gather4 cube workaround integer").
Fixes dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i/ui.*
Cc: [email protected]
Reviewed-by: Marek Olšák <[email protected]>
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v2: pass llvm context reference instead of a pointer
Signed-off-by: Jan Vesely <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
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Changes --enable-omx option to --enable-omx-bellagio
Signed-off-by: Gurkirpal Singh <[email protected]>
Reviewed-and-Tested-by: Julien Isorce <[email protected]>
Acked-by: Christian König <[email protected]>
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Before this change we were defaulting to STD140 which is slightly
less efficient at packing arrays.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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v2: always set can_speculate and allow_smem to true
Reviewed-by: Marek Olšák <[email protected]>
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This will be use to distinguish between load types when using
the TGSI_OPCODE_LOAD opcode.
Reviewed-by: Marek Olšák <[email protected]>
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The virgl protocol version of tgsi doesn't handle this yet,
transform it back to the old ways.
Thanks to Nicolai Hähnle <[email protected]>
for also writing nearly the same patch.
Fixes: 41e342d5 tgsi/ureg: always emit constants (and their decls) as 2D
Tested-by: Rob Herring <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This will allow us to use it from radv.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Bruce Cherniak <[email protected]>
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102552
v2: Patch cleanup proposed by Nicolai Hähnle.
* deleted changes in si_translate_texformat.
Cc: Nicolai Hähnle <[email protected]>
Cc: Ilia Mirkin <[email protected]>
Signed-off-by: Marek Olšák <[email protected]>
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buffers
The GLSL rules for interpolateAtSample are unfortunate:
"Returns the value of the input interpolant variable at
the location of sample number sample. If
multisample buffers are not available, the input
variable will be evaluated at the center of the pixel.
If sample sample does not exist, the position used to
interpolate the input variable is undefined."
This fix will fallback to monolithic shader compilation when
interpolateAtSample is used without multisampling.
One alternative would be to always upload 16 sample positions,
filling the buffer up with repetition when the actual number of
samples is less, and then ANDing the sample ID with 0xf. However,
that punishes all well-behaving users of interpolateAtSample,
when in reality, only conformance tests should be affected by
the issue.
Fixes
dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.non_multisample_buffer.*
Reviewed-by: Marek Olšák <[email protected]>
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gl_SampleMaskIn is supposed to contain set bits only for the samples that
are covered by the current fragment shader invocation, but the VGPR
initialization hardware loads the set of all bits that are covered at the
current pixel.
Fixes various tests in
dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.*
Cc: [email protected]
Reviewed-by: Marek Olšák <[email protected]>
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We need to keep the workaround for older firmware, though.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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If the last operation happens to be a non-draw, such as a
transfer_map that triggers a decompress blit, there may be
interesting messages left in the driver log.
Reviewed-by: Marek Olšák <[email protected]>
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Add InstanceStrideEnable field and rename InstanceDataStepRate to
InstanceAdvancementState in INPUT_ELEMENT_DESC structure.
Add stubs for handling InstanceStrideEnable in FetchJit::JitLoadVertices()
and FetchJit::JitGatherVertices() and assert if they are triggered.
Reviewed-by: Bruce Cherniak <[email protected]>
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Make more robust to handle strange strange configurations like a vmware
exported 4-way numa X 1-core configuration.
Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Add new field in SWR_BACKEND_STATE::vertexClipCullOffset to specify the
start of the clip/cull section of the vertex header. Removed use of
hardcoded slot from binner.
Reviewed-by: Bruce Cherniak <[email protected]>
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Moved from from SWR_RASTSTATE to SWR_BACKEND_STATE.
Reviewed-by: Bruce Cherniak <[email protected]>
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SwrStallBE stalls the backend threads until all work submitted before
the stall has finished. The frontend threads can continue to make
forward progress.
Reviewed-by: Bruce Cherniak <[email protected]>
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