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* r600g: Add defines for per-shader engine settingsGlenn Kennard2017-05-121-0/+6
* r600g: Add instruction encoding defines for MEM_RDGlenn Kennard2017-05-121-0/+30
* r600g: Add scratch ring register definesGlenn Kennard2017-05-122-2/+20
* gallium/tests: fix build after index buffer changesMarek Olšák2017-05-1116-32/+32
* virgl: remove unused draw includeEmil Velikov2017-05-111-1/+0
* radeon: automake: remove unneeded elf Cflags/LibsEmil Velikov2017-05-111-4/+2
* Android: Drop linking libgccRob Herring2017-05-111-4/+0
* Android: rework LLVM build supportRob Herring2017-05-115-13/+12
* Android: rework libelf dependenciesRob Herring2017-05-112-5/+1
* Android: push driver build details to driver makefilesRob Herring2017-05-1116-61/+86
* Android: remove needless conditional including of child makefilesRob Herring2017-05-111-49/+3
* Android: Fix swrast only buildRob Herring2017-05-112-9/+6
* Android: amd: use exported include dirs instead of explicit includesRob Herring2017-05-112-8/+1
* Android: remove remaining explicit libcxx includesRob Herring2017-05-113-4/+1
* Android: drop static linking of R600 LLVM librariesMauro Rossi2017-05-111-6/+1
* gallivm: Fix build against LLVM SVN >= r302589Michel Dänzer2017-05-111-3/+9
* radeonsi: remove upload code for zero-stride vertex attribsMarek Olšák2017-05-101-26/+8
* gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák2017-05-1017-0/+18
* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-10105-1160/+627
* gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytesMarek Olšák2017-05-1013-105/+141
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-1075-338/+372
* radeonsi: silent a compiler warningSamuel Pitoiset2017-05-101-1/+1
* radeonsi: dump compute descriptor listsNicolai Hähnle2017-05-101-0/+10
* radeonsi: dump both enabled and required descriptor slotsNicolai Hähnle2017-05-101-6/+12
* radeonsi: dump compute shader as part of debug dumpNicolai Hähnle2017-05-101-0/+11
* radeonsi: move struct si_compute into a headerNicolai Hähnle2017-05-103-21/+52
* radeonsi: split descriptor list dumpingNicolai Hähnle2017-05-101-16/+21
* radeonsi: split shader dumpingNicolai Hähnle2017-05-101-12/+18
* radeonsi: more const qualifiers in shader dump functionsNicolai Hähnle2017-05-102-12/+12
* ddebug: implement dd_dump_launch_gridNicolai Hähnle2017-05-102-1/+7
* ddebug: extract dd_dump_shaderNicolai Hähnle2017-05-101-74/+82
* gallium/util: dump tokens in util_dump_shader_state only if type is TGSINicolai Hähnle2017-05-101-5/+7
* gallium/util: add util_dump_grid_infoNicolai Hähnle2017-05-102-0/+30
* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-095-14/+14
* freedreno: fix clang error in fd_get_compute_paramRob Herring2017-05-091-1/+1
* swr: fix polygonmode for front==backGeorge Kyriazis2017-05-082-1/+27
* swr/rast: support polygonmode pointGeorge Kyriazis2017-05-081-52/+116
* util: move ALWAYS_INLINE macro to util/macro.hTimothy Arceri2017-05-091-11/+0
* swr: move msaa resolve to generalized StoreTileBruce Cherniak2017-05-083-80/+82
* radeonsi: rename si_eliminate_const_vs_outputs -> si_optimize_vs_outputsMarek Olšák2017-05-081-2/+2
* radeonsi: split per-patch from per-vertex indicesNicolai Hähnle2017-05-083-21/+42
* radeonsi: clarify documentation of existing SI workaroundNicolai Hähnle2017-05-081-1/+3
* radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SINicolai Hähnle2017-05-081-0/+14
* radeonsi: load patch_id for TES-as-ES when exporting for PSNicolai Hähnle2017-05-081-2/+2
* radeonsi: fix primitive ID in fragment shader when using tessellationNicolai Hähnle2017-05-081-10/+17
* radeonsi: mark fast-cleared textures as compressed when dirtyingNicolai Hähnle2017-05-081-2/+14
* nv50/ir: Replace NV50_PROGRAM_IR_* by PIPE_SHADER_IR_*Pierre Moreau2017-05-075-10/+7
* nv50/ir: Remove unused translation methodsPierre Moreau2017-05-072-10/+3
* nv50/ir: Free target if we failed to create a programPierre Moreau2017-05-071-1/+3
* nv50/ir: Fail if encountering unknown shader typePierre Moreau2017-05-071-2/+2
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