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* freedreno: update generated headersRob Clark2016-12-067-20/+129
* freedreno/a5xx: fix alpha testRob Clark2016-12-063-5/+1
* freedreno/a5xx: fix VPC_VAR[n].DISABLE bitsRob Clark2016-12-061-13/+13
* gallivm: optimize 16bit->32bit gather path a bitRoland Scheidegger2016-12-061-3/+39
* gallivm: handle 16bit float fetches in lp_build_fetch_rgba_soaRoland Scheidegger2016-12-061-4/+18
* util: (trivial) ETC1 meets the criteria for fitting into unorm8Roland Scheidegger2016-12-061-0/+5
* st/omx/enc Raise default encode levelAndy Furniss2016-12-051-1/+1
* radeon/vce Handle H.264 level 5.2Andy Furniss2016-12-051-1/+2
* swr: mark PIPE_CAP_NATIVE_FENCE_FD unsupportedTim Rowley2016-12-051-0/+1
* swr: include llvm version and vector width in renderer stringTim Rowley2016-12-051-1/+11
* gallivm: use getHostCPUFeatures on x86/llvm-4.0+.Tim Rowley2016-12-051-0/+15
* st/va: declare vlVaBuffer before vlVaContextJuan A. Suarez Romero2016-12-051-15/+15
* st/va: remove unused variable pbuffJuan A. Suarez Romero2016-12-051-1/+0
* st/va: automake: cleanup C{PP,}FLAGSEmil Velikov2016-12-051-12/+0
* configure.ac: Move llvm_set_environment_variables higher.Tobias Droste2016-12-0511-11/+11
* st/va: fix gop size for rate controlBoyuan Zhang2016-12-052-6/+14
* st/va: force to submit two consecutive single jobsBoyuan Zhang2016-12-053-7/+27
* st/vdpau: fix compiler warning in vlVdpVideoMixerRenderNayan Deshmukh2016-12-051-1/+1
* swr: Fix active_queries countBruce Cherniak2016-12-021-6/+7
* swr: Fix type to match parameters of std::max()George Kyriazis2016-12-021-7/+7
* swr: [rasterizer jitter] include cstdarg in builder_misc.cppTim Rowley2016-12-021-1/+2
* freedreno: no-op render when we need a fenceRob Clark2016-12-013-7/+40
* freedreno: native fence fd supportRob Clark2016-12-017-8/+69
* freedreno: some fence cleanupRob Clark2016-12-019-27/+23
* gallium: support for native fence fd'sRob Clark2016-12-0118-2/+91
* gallium: wire up server_wait_syncRob Clark2016-12-012-1/+11
* tgsi: store writes_primid when scanning tgsiTim Rowley2016-12-012-0/+4
* vc4: Avoid false scheduling dependencies for LOAD_IMMs.Eric Anholt2016-11-302-0/+9
* vc4: Try to schedule QIR instructions between writing to and reading math.Eric Anholt2016-11-301-0/+22
* vc4: Improve interleaving of texture coordinates vs results.Eric Anholt2016-11-301-3/+3
* vc4: Fix stray "." on no-op MUL packs.Eric Anholt2016-11-301-6/+6
* vc4: Allow merging instructions with SF set where the other writes NOP.Eric Anholt2016-11-301-0/+1
* vc4: In a loop break/continue, jump if everyone has taken the path.Eric Anholt2016-11-301-10/+17
* swr: add streamout buffer offset into pBuffer pointerIlia Mirkin2016-11-301-2/+3
* swr: fix assertion for max number of so targetsIlia Mirkin2016-11-301-1/+1
* swr: properly report max number of SO componentsIlia Mirkin2016-11-301-1/+1
* swr: turn off queries around blitsIlia Mirkin2016-11-301-1/+9
* swr: don't advertise stream pause/resumeIlia Mirkin2016-11-301-1/+1
* swr: fix range computation for instanced client-side arraysIlia Mirkin2016-11-302-24/+52
* swr: [rasterizer memory] assert when trying to convert an unknown formatIlia Mirkin2016-11-301-0/+1
* swr: remove warning about multi-layer surfacesIlia Mirkin2016-11-301-4/+0
* swr: [rasterizer core] don't attempt to load another RTAI when storingIlia Mirkin2016-11-301-1/+1
* radeonsi: apply the double EVENT_WRITE_EOP workaround to VI as wellMarek Olšák2016-12-011-2/+4
* radeonsi: add a tess+GS hang workaround for VI dGPUsMarek Olšák2016-12-011-2/+10
* radeonsi: don't apply the Z export bug workaround to HainanMarek Olšák2016-12-011-2/+3
* radeonsi: apply a tessellation bug workaround for SIMarek Olšák2016-12-011-0/+7
* radeonsi: apply a TC L1 write corruption workaround for SIMarek Olšák2016-12-011-11/+23
* radeonsi: apply a multi-wave workgroup SPI bug workaround to affected CIK chipsMarek Olšák2016-12-014-4/+29
* radeonsi: consolidate max-work-group-size computationMarek Olšák2016-12-011-24/+19
* freedreno/a5xx: fix negative branchesRob Clark2016-11-302-1/+6