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* ilo: share some code between {tex,buf}_create_boChia-I Wu2014-07-241-59/+55
* ilo: use native 3-component vertex formats on GEN7.5+Chia-I Wu2014-07-242-1/+6
* ilo: allow for device-dependent format translationChia-I Wu2014-07-245-32/+39
* freedreno/a3xx/compiler: fix p0 (kill, etc)Rob Clark2014-07-231-1/+2
* Revert "r600g/compute: Fix warnings"Tom Stellard2014-07-232-16/+12
* radeon/llvm: fix formattingGrigori Goronzy2014-07-231-10/+14
* radeon/llvm: enable unsafe math for graphics shadersGrigori Goronzy2014-07-231-0/+5
* r600g/compute: Fix warningsTom Stellard2014-07-232-12/+16
* r600g: Use hardware sqrt instructionGlenn Kennard2014-07-232-7/+4
* r600g/compute: Remove unneeded code from compute_memory_promote_itemBruno Jiménez2014-07-232-36/+12
* r600g/compute: Quick exit if there's nothing to add to the poolBruno Jiménez2014-07-231-0/+4
* r600g/compute: Defrag the pool if it's necesaryBruno Jiménez2014-07-232-17/+19
* r600g/compute: Add a function for defragmenting the poolBruno Jiménez2014-07-232-0/+28
* r600g/compute: Add a function for moving items in the poolBruno Jiménez2014-07-232-0/+93
* freedreno/a3xx: more vtx formatsRob Clark2014-07-231-0/+17
* freedreno/a3xx/compiler: const file relative addressingRob Clark2014-07-238-68/+203
* freedreno/a3xx/compiler: move functionRob Clark2014-07-231-35/+35
* freedreno/a3xx: add back a few stallsRob Clark2014-07-231-0/+8
* targets/dri: fix freedreno targetsRob Clark2014-07-232-3/+11
* freedreno: update generated headersRob Clark2014-07-234-14/+14
* r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTTMichel Dänzer2014-07-2317-26/+77
* winsys/radeon: Use separate caching buffer managers for VRAM and GTTMichel Dänzer2014-07-233-9/+20
* radeonsi/compute: Add support scratch buffer support v2Tom Stellard2014-07-213-2/+85
* radeonsi/compute: Bump number of user sgprs for LLVM 3.5Tom Stellard2014-07-211-1/+6
* winsys/radeon: Query the kernel for the number of SEs and SHs per SETom Stellard2014-07-212-0/+8
* radeonsi/compute: Share COMPUTE_DBG macro with r600gTom Stellard2014-07-213-13/+10
* radeonsi: Read rodata from ELF and append it to the end of shadersTom Stellard2014-07-213-1/+22
* radeonsi: only update vertex buffers when they need updatingMarek Olšák2014-07-183-2/+22
* radeonsi: remove nr_vertex_buffersMarek Olšák2014-07-183-6/+23
* radeonsi: move vertex buffer descriptors from IB to memoryMarek Olšák2014-07-187-106/+133
* radeonsi: add support for fine-grained sampler view updatesMarek Olšák2014-07-183-30/+21
* radeonsi: move si_set_sampler_views to si_descriptors.cMarek Olšák2014-07-183-73/+68
* radeonsi: move sampler descriptors from IB to memoryMarek Olšák2014-07-185-82/+82
* radeonsi: implement ARB_draw_indirectMarek Olšák2014-07-185-17/+128
* radeonsi: don't add info->start to the index buffer offsetMarek Olšák2014-07-181-11/+25
* radeonsi: use an SGPR instead of VGT_INDX_OFFSETMarek Olšák2014-07-184-14/+23
* radeonsi: assume LLVM 3.4.2 is always presentMarek Olšák2014-07-186-56/+7
* st/mesa,gallium: add a workaround for Unigine Heaven 4.0 and Valley 1.0Marek Olšák2014-07-183-0/+4
* r600g: Implement GL_ARB_texture_gatherGlenn Kennard2014-07-182-7/+42
* nv50: fix build failure on m68k due to invalid struct alignment assumptionsThorsten Glaser2014-07-171-0/+5
* clover: Call end_query before getting timestamp result v2Tom Stellard2014-07-171-0/+1
* ilo: add some missing formatsChia-I Wu2014-07-161-21/+22
* ilo: update and tailor the surface format tableChia-I Wu2014-07-161-286/+258
* nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYSChristoph Bumiller2014-07-151-13/+28
* nvc0: add support for indirect drawingChristoph Bumiller2014-07-158-30/+220
* nouveau: check if a fence has already been signalledIlia Mirkin2014-07-151-0/+3
* radeon/llvm: Fix LLVM diagnostic error reportingTom Stellard2014-07-151-7/+4
* util/tgsi: Fix ureg_EMIT/ENDPRIM prototype.José Fonseca2014-07-151-2/+2
* ilo: raise texture size limitsChia-I Wu2014-07-152-17/+9
* ilo: move away from drm_intel_bo_alloc_tiledChia-I Wu2014-07-155-304/+359
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