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gallium
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Author
Age
Files
Lines
*
ilo: use native 3-component vertex formats on GEN7.5+
Chia-I Wu
2014-07-24
2
-1
/
+6
*
ilo: allow for device-dependent format translation
Chia-I Wu
2014-07-24
5
-32
/
+39
*
freedreno/a3xx/compiler: fix p0 (kill, etc)
Rob Clark
2014-07-23
1
-1
/
+2
*
Revert "r600g/compute: Fix warnings"
Tom Stellard
2014-07-23
2
-16
/
+12
*
radeon/llvm: fix formatting
Grigori Goronzy
2014-07-23
1
-10
/
+14
*
radeon/llvm: enable unsafe math for graphics shaders
Grigori Goronzy
2014-07-23
1
-0
/
+5
*
r600g/compute: Fix warnings
Tom Stellard
2014-07-23
2
-12
/
+16
*
r600g: Use hardware sqrt instruction
Glenn Kennard
2014-07-23
2
-7
/
+4
*
r600g/compute: Remove unneeded code from compute_memory_promote_item
Bruno Jiménez
2014-07-23
2
-36
/
+12
*
r600g/compute: Quick exit if there's nothing to add to the pool
Bruno Jiménez
2014-07-23
1
-0
/
+4
*
r600g/compute: Defrag the pool if it's necesary
Bruno Jiménez
2014-07-23
2
-17
/
+19
*
r600g/compute: Add a function for defragmenting the pool
Bruno Jiménez
2014-07-23
2
-0
/
+28
*
r600g/compute: Add a function for moving items in the pool
Bruno Jiménez
2014-07-23
2
-0
/
+93
*
freedreno/a3xx: more vtx formats
Rob Clark
2014-07-23
1
-0
/
+17
*
freedreno/a3xx/compiler: const file relative addressing
Rob Clark
2014-07-23
8
-68
/
+203
*
freedreno/a3xx/compiler: move function
Rob Clark
2014-07-23
1
-35
/
+35
*
freedreno/a3xx: add back a few stalls
Rob Clark
2014-07-23
1
-0
/
+8
*
targets/dri: fix freedreno targets
Rob Clark
2014-07-23
2
-3
/
+11
*
freedreno: update generated headers
Rob Clark
2014-07-23
4
-14
/
+14
*
r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT
Michel Dänzer
2014-07-23
17
-26
/
+77
*
winsys/radeon: Use separate caching buffer managers for VRAM and GTT
Michel Dänzer
2014-07-23
3
-9
/
+20
*
radeonsi/compute: Add support scratch buffer support v2
Tom Stellard
2014-07-21
3
-2
/
+85
*
radeonsi/compute: Bump number of user sgprs for LLVM 3.5
Tom Stellard
2014-07-21
1
-1
/
+6
*
winsys/radeon: Query the kernel for the number of SEs and SHs per SE
Tom Stellard
2014-07-21
2
-0
/
+8
*
radeonsi/compute: Share COMPUTE_DBG macro with r600g
Tom Stellard
2014-07-21
3
-13
/
+10
*
radeonsi: Read rodata from ELF and append it to the end of shaders
Tom Stellard
2014-07-21
3
-1
/
+22
*
radeonsi: only update vertex buffers when they need updating
Marek Olšák
2014-07-18
3
-2
/
+22
*
radeonsi: remove nr_vertex_buffers
Marek Olšák
2014-07-18
3
-6
/
+23
*
radeonsi: move vertex buffer descriptors from IB to memory
Marek Olšák
2014-07-18
7
-106
/
+133
*
radeonsi: add support for fine-grained sampler view updates
Marek Olšák
2014-07-18
3
-30
/
+21
*
radeonsi: move si_set_sampler_views to si_descriptors.c
Marek Olšák
2014-07-18
3
-73
/
+68
*
radeonsi: move sampler descriptors from IB to memory
Marek Olšák
2014-07-18
5
-82
/
+82
*
radeonsi: implement ARB_draw_indirect
Marek Olšák
2014-07-18
5
-17
/
+128
*
radeonsi: don't add info->start to the index buffer offset
Marek Olšák
2014-07-18
1
-11
/
+25
*
radeonsi: use an SGPR instead of VGT_INDX_OFFSET
Marek Olšák
2014-07-18
4
-14
/
+23
*
radeonsi: assume LLVM 3.4.2 is always present
Marek Olšák
2014-07-18
6
-56
/
+7
*
st/mesa,gallium: add a workaround for Unigine Heaven 4.0 and Valley 1.0
Marek Olšák
2014-07-18
3
-0
/
+4
*
r600g: Implement GL_ARB_texture_gather
Glenn Kennard
2014-07-18
2
-7
/
+42
*
nv50: fix build failure on m68k due to invalid struct alignment assumptions
Thorsten Glaser
2014-07-17
1
-0
/
+5
*
clover: Call end_query before getting timestamp result v2
Tom Stellard
2014-07-17
1
-0
/
+1
*
ilo: add some missing formats
Chia-I Wu
2014-07-16
1
-21
/
+22
*
ilo: update and tailor the surface format table
Chia-I Wu
2014-07-16
1
-286
/
+258
*
nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS
Christoph Bumiller
2014-07-15
1
-13
/
+28
*
nvc0: add support for indirect drawing
Christoph Bumiller
2014-07-15
8
-30
/
+220
*
nouveau: check if a fence has already been signalled
Ilia Mirkin
2014-07-15
1
-0
/
+3
*
radeon/llvm: Fix LLVM diagnostic error reporting
Tom Stellard
2014-07-15
1
-7
/
+4
*
util/tgsi: Fix ureg_EMIT/ENDPRIM prototype.
José Fonseca
2014-07-15
1
-2
/
+2
*
ilo: raise texture size limits
Chia-I Wu
2014-07-15
2
-17
/
+9
*
ilo: move away from drm_intel_bo_alloc_tiled
Chia-I Wu
2014-07-15
5
-304
/
+359
*
radeonsi: partially revert "switch descriptors to i32 vectors"
Marek Olšák
2014-07-14
1
-0
/
+12
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