Commit message (Collapse) | Author | Age | Files | Lines | |
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* | nouveau: Fix serious compiler warnings | Johannes Obermayr | 2011-03-18 | 1 | -0/+1 |
| | | | | | | Fixes https://bugs.freedesktop.org/show_bug.cgi?id=35025 Signed-off-by: Brian Paul <[email protected]> | ||||
* | svga: Leave any_user_vertex_buffers flag alone. | José Fonseca | 2011-03-16 | 2 | -3/+0 |
| | | | | | It is pointless to change, now that we don't replace user vertex buffer with uploaded copy, per commit 52e598d200108ab9cfc9c9d828bbebdc576e9703. | ||||
* | svga: Hardcode SVGA_COMBINE_USERBUFFERS to 1. | José Fonseca | 2011-03-16 | 5 | -38/+12 |
| | | | | | | | | The code no longer supports otherwise -- it relies on buffers being uploaded via u_upload_mgr -- so make this clear. Also, there's no need to flush after draws from user buffers, given all user content should have been copied by then. | ||||
* | svga: Use transfer information on buffer transfers. | José Fonseca | 2011-03-16 | 2 | -107/+81 |
| | | | | | | | | Should prevent the assert failure svga_buffer_flush_mapped_range: Assertion `sbuf->map.writing' failed. on nested transfers. | ||||
* | i915g: fix braino in the static state rework | Daniel Vetter | 2011-03-15 | 1 | -1/+2 |
| | | | | | | For mip-map level rendering, both draw offset and size tend to change ... Signed-off-by: Daniel Vetter <[email protected]> | ||||
* | i915g: implement early z | Daniel Vetter | 2011-03-15 | 4 | -20/+55 |
| | | | | | | v2: Make it actually work. Signed-off-by: Daniel Vetter <[email protected]> | ||||
* | i915g: split up static state | Daniel Vetter | 2011-03-15 | 5 | -28/+54 |
| | | | | | | | | Early Z support is set in the DST_VARS command. Hence split up static state emission to avoid reissuing to much on fragment shader changes, especially the costly dst buffer relocations. Signed-off-by: Daniel Vetter <[email protected]> | ||||
* | svga: Tell the host to discard when doing writes without FLUSH_EXPLICIT. | José Fonseca | 2011-03-15 | 1 | -3/+10 |
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* | svga: Update svga_winsys_screen::buffer_map comments. | José Fonseca | 2011-03-15 | 1 | -2/+2 |
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* | svga: Ensure DMA commands are serialized with unsynchronized flag is unset. | José Fonseca | 2011-03-15 | 3 | -19/+113 |
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* | r300g: implement the texture barrier | Marek Olšák | 2011-03-15 | 1 | -0/+10 |
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* | gallium: add texture barrier support to the interface and st/mesa (v2) | Marek Olšák | 2011-03-15 | 2 | -0/+15 |
| | | | | v2: change the gallium entry point to texture_barrier. | ||||
* | gallium/util: Use PIPE_TRANSFER_DISCARD_RANGE in pipe_buffer_write. | Mathias Fröhlich | 2011-03-15 | 1 | -0/+2 |
| | | | | | | | | Additionally, to discarding the whole buffer, use PIPE_TRANSFER_DISCARD_RANGE in pipe_buffer_write when the write covers only part of the buffer. Signed-off-by: Mathias Fröhlich <[email protected]> | ||||
* | r600g: FLT_TO_INT_FLOOR and FLT_TO_INT_RPI are vector-only instructions on ↵ | Henri Verbeet | 2011-03-15 | 1 | -3/+6 |
| | | | | | | Evergreen. Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r600g: fix logic error in 028987c80362eddd39176628486a456b076f0427 | Alex Deucher | 2011-03-14 | 1 | -1/+1 |
| | | | | | | Spotted by Henri on IRC. Signed-off-by: Alex Deucher <[email protected]> | ||||
* | r600g: don't set per-MRT blend bits on R600 | Alex Deucher | 2011-03-14 | 1 | -5/+10 |
| | | | | | | | | | It doesn't support them. Also, we shouldn't be emitting CB_BLENDx_CONTROL on R600 as the regs don't exist there, but I'm not sure of the best way to deal with this in the current r600 winsys. Signed-off-by: Alex Deucher <[email protected]> | ||||
* | r600g: Original R600 does not support per-MRT blends | Alex Deucher | 2011-03-14 | 1 | -2/+11 |
| | | | | | | Only rv6xx+ support them. Signed-off-by: Alex Deucher <[email protected]> | ||||
* | r600g: emit SURFACE_BASE_UPDATE packet on rv6xx | Alex Deucher | 2011-03-14 | 2 | -2/+25 |
| | | | | | | | | This packet is required when updating the DB, CB, or STRMOUT base addresses on rv6xx for the surface sync logic to work correctly. Signed-off-by: Alex Deucher <[email protected]> | ||||
* | r600g: Properly update MULTIWRITE_ENABLE in r600_pipe_shader_ps(). | Henri Verbeet | 2011-03-14 | 2 | -8/+7 |
| | | | | | | | This sort of worked because blend state setup cleared MULTIWRITE_ENABLE again, but that's not something we want to depend on. Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r600g: Fix the DB_SHADER_CONTROL mask in create_ds_state(). | Henri Verbeet | 2011-03-14 | 2 | -10/+8 |
| | | | | Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r600g: Properly update DB_SHADER_CONTROL in evergreen_pipe_shader_ps(). | Henri Verbeet | 2011-03-14 | 1 | -18/+14 |
| | | | | | | | Disable Z_EXPORT / STENCIL_EXPORT / KILL_ENABLE again if a shader doesn't use those. This is similar to 0a6f09a76a416b8672e149c520aa5bef33174223. Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r600g: Move fetch shader register setup to r600_state.c / evergreen_state.c. | Henri Verbeet | 2011-03-14 | 6 | -31/+32 |
| | | | | Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r600g: Move r600_pipe_shader_ps() to r600_state.c. | Henri Verbeet | 2011-03-14 | 3 | -95/+97 |
| | | | | Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r600g: Move r600_pipe_shader_vs() to r600_state.c. | Henri Verbeet | 2011-03-14 | 3 | -49/+49 |
| | | | | | | | | The idea behind this is that anything touching registers should be in r600_state.c or evergreen_state.c. This is also consistent with evergreen_pipe_shader_vs(). Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r600g: Evergreen add support for log opcode. | Rafael Monica | 2011-03-14 | 1 | -1/+1 |
| | | | | Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | r300g: clamp after blending for fixed-point formats only | Marek Olšák | 2011-03-14 | 3 | -14/+36 |
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* | gallivm: Fix build with llvm 2.6 on 32bit platforms | José Fonseca | 2011-03-13 | 1 | -2/+4 |
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* | gallivm: Use LLVM MC disassembler, instead of udis86. | José Fonseca | 2011-03-13 | 7 | -227/+369 |
| | | | | | Included in LLVM 2.7+. Unlink udis86, should support all instructions that LLVM can emit. | ||||
* | util: Silence gcc unitialized member warning | José Fonseca | 2011-03-13 | 1 | -0/+1 |
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* | draw: Fix draw_variant_output::format's type. | José Fonseca | 2011-03-13 | 2 | -3/+4 |
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* | nv50,nvc0: don't assert on cso with 0 vertex elements | Christoph Bumiller | 2011-03-13 | 3 | -6/+2 |
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* | rbug: Use the call mutex | Jakob Bornecrantz | 2011-03-13 | 1 | -19/+187 |
| | | | | Fixes crashes in [soft|llvm]pipe when replacing shaders | ||||
* | r600g: Only update DB_SHADER_CONTROL once in r600_pipe_shader_ps(). | Mathias Fröhlich | 2011-03-13 | 1 | -16/+13 |
| | | | | | | | | | Avoid setting the same gpu register several times in a r600_pipe_state. Compute the final value of the register and set that one time. This avoids some overhead in r600_context_pipe_state_set(). Signed-off-by: Mathias Fröhlich <[email protected]> Signed-off-by: Henri Verbeet <[email protected]> | ||||
* | tgsi: Fix parsing of properties with digits in the name | Jakob Bornecrantz | 2011-03-13 | 1 | -1/+1 |
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* | rbug: Skip drawing on disabled shaders | Jakob Bornecrantz | 2011-03-13 | 1 | -1/+4 |
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* | rbug: Remove flags from flush | Jakob Bornecrantz | 2011-03-13 | 2 | -6/+0 |
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* | i915g: Lie more so we get GLSL | Jakob Bornecrantz | 2011-03-13 | 1 | -2/+3 |
| | | | | Lots of piglit tests are lazy and wants GLSL | ||||
* | i915g: Point sprite cap could be supported | Jakob Bornecrantz | 2011-03-13 | 1 | -1/+2 |
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* | i915g: Sort cap list | Jakob Bornecrantz | 2011-03-13 | 1 | -1/+1 |
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* | nvc0: support edge flags | Christoph Bumiller | 2011-03-13 | 4 | -14/+88 |
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* | nvc0: fix POLYGON_MODE_BACK macro copy/paste error | Christoph Bumiller | 2011-03-13 | 1 | -1/+1 |
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* | nv50,nvc0: fix pipe context switch | Christoph Bumiller | 2011-03-13 | 2 | -10/+64 |
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* | nv50,nvc0: clean up flushes | Christoph Bumiller | 2011-03-13 | 5 | -38/+28 |
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* | nv50,nvc0: add some missing resource referencing | Christoph Bumiller | 2011-03-13 | 4 | -7/+64 |
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* | nvc0: mask out centroid bit for writing FP header | Christoph Bumiller | 2011-03-13 | 1 | -1/+1 |
| | | | | It's only 2 bit per input, centroid is set in the instruction. | ||||
* | nvc0: identify VERTEX_QUARANTINE | Christoph Bumiller | 2011-03-13 | 3 | -8/+17 |
| | | | | | | | | Well, not sure what exactly it is, but it certainly doesn't contain the control flow stack, but vertex data. Not sure about size, I've only seen the first few KiB written, but the binary driver seems to allocate more. | ||||
* | nvc0: don't enable early-z if alpha test is enabled | Christoph Bumiller | 2011-03-13 | 4 | -12/+20 |
| | | | | | | Depth values are also written before the shader is executed, so if early tests are enabled, fragments that failed the alpha test were modifying the depth buffer, but they shouldn't. | ||||
* | nvc0: move sprite coord replace state into cso | Christoph Bumiller | 2011-03-13 | 2 | -27/+8 |
| | | | | It's not dependent on any other state anymore now. | ||||
* | nvc0: s/nblocksx/nblocksy for height in resource_copy_region | Christoph Bumiller | 2011-03-13 | 1 | -1/+1 |
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* | nvc0: fix unitialized variable in TGSI sysval decl processing | Christoph Bumiller | 2011-03-13 | 1 | -0/+1 |
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