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* etnaviv: add etna_shader_key and generate variants if neededChristian Gmeiner2017-04-058-29/+97
| | | | Signed-off-by: Christian Gmeiner <[email protected]>
* etnaviv: pass a preallocated variant to compilerChristian Gmeiner2017-04-054-38/+62
| | | | | | | | | | | In the long run the compiler needs to know the specifc variant 'key' in order to compile appropriate assembly. With this commit the variant knows its shader and we are able pass the preallocated variant into etna_compile_shader(..). This saves us from passing extra ptrs everywhere. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Lucas Stach <[email protected]>
* etnaviv: make specs constChristian Gmeiner2017-04-051-1/+1
| | | | Signed-off-by: Christian Gmeiner <[email protected]>
* etnaviv: add struct etna_shader_stateChristian Gmeiner2017-04-055-23/+24
| | | | | Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Lucas Stach <[email protected]>
* etnaviv: add basic shader variant supportChristian Gmeiner2017-04-053-4/+60
| | | | | | | | | This commit adds some basic infrastructure to handle shader variants. We are still creating exactly one shader variant for each shader. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Lucas Stach <[email protected]>
* etnaviv: s/etna_shader/etna_shader_variantChristian Gmeiner2017-04-057-34/+34
| | | | | | Prep work to add shader variant support. Signed-off-by: Christian Gmeiner <[email protected]>
* etnaviv: remove not needed forward declarationsChristian Gmeiner2017-04-051-2/+0
| | | | Signed-off-by: Christian Gmeiner <[email protected]>
* gallium/util: honour LIBUNWIND_CFLAGSEmil Velikov2017-04-051-0/+1
| | | | | Fixes: 70c272004f72 ("gallium/util: libunwind support") Signed-off-by: Emil Velikov <[email protected]>
* st/clover: Fix build after shrink of pipe_boxAaron Watry2017-04-051-3/+3
| | | | | | | | Fixes: 3dfe61e ("gallium: decrease the size of pipe_box - 24 -> 16 bytes") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100569 Signed-off-by: Aaron Watry <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Tested-by: Vinson Lee <[email protected]>
* radeonsi: enable ARB_shader_ballotNicolai Hähnle2017-04-051-1/+3
| | | | | | | | Require LLVM 5.0 or later because LLVM 4.0 is easily fooled into putting the lane select of llvm.amdgcn.readlane into a VGPR and then fails to continue to compile. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: optimization barriers to work around LLVM deficienciesNicolai Hähnle2017-04-051-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Notably, llvm.amdgcn.readfirstlane and llvm.amdgcn.icmp may be hoisted out of loops or if/else branches in cases like if (cond) { v = readFirstInvocationARB(x); ... use v ... } else { v = readFirstInvocationARB(x); ... use v ... } ===> v = readFirstInvocationARB(x); if (cond) { ... use v ... } else { ... use v ... } The optimization barrier is a heavy hammer to stop that until LLVM is taught the semantics of the intrinsic properly. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: strengthen emit_optimization_barrierNicolai Hähnle2017-04-052-4/+38
| | | | | | | | | | | | | LLVM will lift inline assembly out of if-else-blocks if both paths have the same inline assembly. Prevent this by adding an irrelevant unique text to the assembly. This requires the LLVM assembly parser to be initialized. Furthermore, allow forcing subsequent computations to happen after the optimization barrier by defining a data dependency. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: emit TGSI_OPCODE_READ_*Nicolai Hähnle2017-04-051-0/+38
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: emit TGSI_OPCODE_BALLOTNicolai Hähnle2017-04-051-0/+18
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement TGSI_SEMANTIC_SUBGROUP_*Nicolai Hähnle2017-04-051-0/+40
| | | | | | 64-bit system values are stored as v2i32 to simplify the fetch logic. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: support 64-bit system valuesNicolai Hähnle2017-04-051-4/+20
| | | | | | | For simplicitly, always store system values as 32-bit values or arrays of 32-bit values. 64-bit values are unpacked and packed accordingly. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: bump RADEON_LLVM_MAX_SYSTEM_VALUESNicolai Hähnle2017-04-052-1/+3
| | | | | | | ARB_shader_ballot introduces 7 new system values that can be used in all shader stages. Reviewed-by: Marek Olšák <[email protected]>
* tgsi: add SUBGROUP_* semanticsIlia Mirkin2017-04-053-0/+65
| | | | | | | | v2: add documentation (Nicolai) Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* tgsi: add BALLOT/READ_* opcodesIlia Mirkin2017-04-053-17/+63
| | | | | | | | | | | | | | | | | | | | v2 (Nicolai): - BALLOT isn't per-channel - expand the documentation (also for VOTE_*) v3: - only BALLOT returns a 64-bit lanemask (Boyan) - relax the requirement on READ_INVOC: the invocation number to read from must be uniform within a sub-group. This matches the GL_ARB_shader_ballot spect (and the v_readlane instruction of AMD GCN) v4: - hopefully really fix the doc of VOTE_* returns (Ilia) Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v2)
* gallium: add PIPE_CAP_TGSI_BALLOTNicolai Hähnle2017-04-0517-0/+18
| | | | Reviewed-by: Marek Olšák <[email protected]>
* swr: automake: add gen_common.py to the tarballEmil Velikov2017-04-051-0/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: enable ARB_sparse_bufferNicolai Hähnle2017-04-051-1/+10
| | | | | | | | v2: - fill in DRM version requirement - disable on SI due to CP DMA faults Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: disable SDMA clears and copies for sparse buffersNicolai Hähnle2017-04-053-4/+11
| | | | | | | | | VM faults cannot be disabled for SDMA on <= VI. We could still use SDMA by asking the winsys about which parts of the buffers are committed. This is left as a potential future improvement. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: implement pipe->resource_commitNicolai Hähnle2017-04-051-0/+35
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: transfers and invalidation for sparse buffersNicolai Hähnle2017-04-051-10/+24
| | | | | | Sparse buffers can never be mapped by the CPU. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: implement sparse buffer creationNicolai Hähnle2017-04-051-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: sparse buffer debugging helpersNicolai Hähnle2017-04-051-0/+61
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: take fences when freeing a backing bufferNicolai Hähnle2017-04-051-3/+11
| | | | | | | | | | | We never add fences to backing buffers during submit. When we free a backing buffer, it must inherit the sparse buffer's fences, so that it doesn't get re-used prematurely via the cache. v2: - remove pipe_mutex_* Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: add sparse buffers to CSNicolai Hähnle2017-04-052-16/+140
| | | | | | | | | | ... and implement the corresponding fence handling. v2: - add missing bit in amdgpu_bo_is_referenced_by_cs_with_usage - remove pipe_mutex_* Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: sparse buffer creation / destruction / commitmentNicolai Hähnle2017-04-051-1/+400
| | | | | | | | | | | | | | This is the bulk of the buffer allocation logic. It is fairly simple and stupid. We'll probably want to use e.g. interval trees at some point to keep track of commitments, but Mesa doesn't have an implementation of those yet. v2: - remove pipe_mutex_* - fix total_backing_pages accounting - simplify by using the new VA_OP_CLEAR/REPLACE kernel interface Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: add sparse buffer data structuresNicolai Hähnle2017-04-052-1/+46
| | | | | | | | v2: - remove pipe_mutex_* - use a simple page commitment array Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: extend amdgpu_add_fence to allow adding multiple fencesNicolai Hähnle2017-04-052-11/+27
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: build handles and flags list late on submit threadNicolai Hähnle2017-04-052-17/+28
| | | | | | | | | | | This probably has only minor performance effects, but it simplifies some subsequent code slightly. Ideally, it could also be used to simplify the handling of slab buffers in the same way, but unfortunately that's not possible as long as we need indices for relocations. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: share common code in amdgpu_add_fence_dependenciesNicolai Hähnle2017-04-051-21/+17
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: extract amdgpu_do_add_real_bufferNicolai Hähnle2017-04-051-8/+18
| | | | | | We will use it for delayed adding of sparse buffers' backing buffers. Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: sparse buffers will not be supportedNicolai Hähnle2017-04-051-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeon/winsys: add sparse buffer interfaceNicolai Hähnle2017-04-051-0/+17
| | | | Reviewed-by: Marek Olšák <[email protected]>
* trace: add resource_commit pass-throughNicolai Hähnle2017-04-051-0/+20
| | | | | | v2: fix return type to bool (Marek) Reviewed-by: Marek Olšák <[email protected]>
* ddebug: add resource_commit pass-throughNicolai Hähnle2017-04-051-0/+11
| | | | | | v2: fix return type to bool (Marek) Reviewed-by: Marek Olšák <[email protected]>
* gallium: add sparse buffer interface and capabilityNicolai Hähnle2017-04-0519-0/+58
| | | | | | | v2: - explain the resource_commit interface in more detail Reviewed-by: Marek Olšák <[email protected]>
* libgl-xlib: Link with libunwind.Vinson Lee2017-04-041-1/+2
| | | | | | | | | | | | | | | | | | Fix linking error. CXXLD libGL.la ../../../../src/gallium/auxiliary/.libs/libgallium.a(u_debug_stack.o): In function `debug_backtrace_capture': src/gallium/auxiliary/util/u_debug_stack.c:59: undefined reference to `_Ux86_64_getcontext' src/gallium/auxiliary/util/u_debug_stack.c:60: undefined reference to `_ULx86_64_init_local' src/gallium/auxiliary/util/u_debug_stack.c:62: undefined reference to `_ULx86_64_step' src/gallium/auxiliary/util/u_debug_stack.c:71: undefined reference to `_ULx86_64_get_proc_info' src/gallium/auxiliary/util/u_debug_stack.c:73: undefined reference to `_ULx86_64_get_proc_name' src/gallium/auxiliary/util/u_debug_stack.c:65: undefined reference to `_ULx86_64_step' Fixes: 70c272004f72 ("gallium/util: libunwind support") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100562 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* targets: export radeon winsys_create functions to silence LLVM warningMarek Olšák2017-04-043-0/+15
| | | | | | | | | | | | It silences the following radeonsi LLVM warning due to a previous commit adding an LLVM workaround: "mesa: for the -simplifycfg-sink-common option: may only occur zero or one times!" Cc: 17.0 <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by; Emil Velikov <[email protected]>
* r600g: check rasterizer primitive states like in radeonsiConstantine Kharlamov2017-04-041-8/+13
| | | | | | | | | | | | Specifically, non-line primitives skipped, and defaulting to reset on each packet. The skip of non-line primitives saves ≈110 resetting of PA_SC_LINE_STIPPLE register per frame in Kane&Lynch2. Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: extract a code into a r600_emit_rasterizer_prim_state()Constantine Kharlamov2017-04-043-14/+33
| | | | | | | | | | | Also change gs_output_prim type: unsigned → pipe_prim_type. The idea of the code is mostly taken from radeonsi. The new code operating on prev/curr rast_primitives saves ≈15 reloads of PA_SC_LINE_STIPPLE per frame in Kane&Lynch2 Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g/radeonsi: use the correct types (taken from pipe_draw_info)Constantine Kharlamov2017-04-043-7/+8
| | | | | | | | | | | Note: si_shader.h has also "type" variable that should be changed to "enum pipe_prim_type", however it triggers a bunch of warnings about unhandled switches, so due not knowing the correct way to handle them, I decided to leave it as is. Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: remove duplicate memset by using a pointer, and constify argsConstantine Kharlamov2017-04-041-22/+19
| | | | | | Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeonsi: access gallivm through ctx in most placesMarek Olšák2017-04-043-87/+79
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ctx->types instead of bld->types etc.Marek Olšák2017-04-042-23/+21
| | | | | | even vec_type is f32. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use i32_0/1 instead of *int_bld.zero/one in most placesMarek Olšák2017-04-042-55/+47
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: decrease the size of pipe_draw_info - 88 -> 80 bytesMarek Olšák2017-04-042-3/+9
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]>
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