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* tgsi: remove post_indent from some 64-bit opcodesNicolai Hähnle2017-08-231-6/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* tgsi: reduce tgsi_opcode_info::pre_dedent and post_indent to 1 bitNicolai Hähnle2017-08-231-2/+2
| | | | | | | | It's not clear why they were ever 2 bits to begin with. Perhaps the original intent was to use signed values, but that doesn't seem to have ever been the case in master. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: fix saving multi-part command streamsNicolai Hähnle2017-08-231-1/+1
| | | | | | Use the correct type to fix pointer arithmetic. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: update comment describing indices into sctx->descriptorsNicolai Hähnle2017-08-231-6/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* util: fix valgrind errors when dumping pipe_draw_infoNicolai Hähnle2017-08-231-3/+9
| | | | | | | Various index-related fields are only initialized when required, so they should only be dumped in those cases. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: do not assert when reserving bindless slot 0Samuel Pitoiset2017-08-231-1/+4
| | | | | | | | | When assertions were disabled, the compiler removed the call to util_idalloc_alloc() and the first allocated bindless slot was 0 which is invalid per the spec. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: rename some bindless-related helper functionsSamuel Pitoiset2017-08-231-21/+21
| | | | | | | I think it makes more sense. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: minor cleanups in si_make_{texture,image}_handle_resident()Samuel Pitoiset2017-08-231-12/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* Android: gallium_dri: pass dri.sym to linkerRob Herring2017-08-221-0/+7
| | | | | | | | | | | | | | | | Pass the dri.sym version script to the linker. This ensures only explicitly exported symbols are exported and shrinks the library by up to 60KB. HAVE_DLADDR also needs to be set so that __driDriverExtensions is defined. We need to pass "--undefined-version" because the Android build system sets --no-undefined-version by default and we get an error on driver specific symbols if those drivers are disabled without the option. Suggested-by: Emil Velikov <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* st/va: enable P016 format i.e. reallocate buffer if format changedLeo Liu2017-08-221-0/+12
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: enable P016 mode supportLeo Liu2017-08-221-7/+11
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: correct target buffer pitch calculationLeo Liu2017-08-221-1/+1
| | | | | | | since the way should be as same as UVD Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* tgsi/scan: fix uses_doubleMarek Olšák2017-08-221-2/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: remove TGSI opcode SCSMarek Olšák2017-08-2222-491/+14
| | | | | | | use COS+SIN instead. Reviewed-by: Roland Scheidegger <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* gallium/u_blitter: don't use boolean, TRUE, FALSEMarek Olšák2017-08-222-73/+73
| | | | | | | v2: cherry-picked from the bigger patch series Reviewed-by: Nicolai Hähnle <[email protected]> (v1) Tested-by: Brian Paul <[email protected]>
* gallium/u_simple_shaders: do util_make_layered_clear_vertex_shader differentlyMarek Olšák2017-08-223-25/+19
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Brian Paul <[email protected]>
* gallium/u_blitter: remove get_next_surface_layer callbackMarek Olšák2017-08-222-15/+1
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Brian Paul <[email protected]>
* gallium: remove TGSI opcode BREAKCMarek Olšák2017-08-2213-133/+7
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: remove TGSI opcode XPDMarek Olšák2017-08-2223-532/+30
| | | | | | use MUL+MAD+MOV instead. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: remove TGSI opcode DPHMarek Olšák2017-08-2221-255/+11
| | | | | | use DP4 or DP3 + ADD. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: remove TGSI opcode DP2AMarek Olšák2017-08-2216-182/+6
| | | | | | use DP3 instead. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: remove TGSI_OPCODE_CALLNZMarek Olšák2017-08-229-23/+4
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: remove TGSI FENCE opcodesMarek Olšák2017-08-225-56/+13
| | | | | | use MEMBAR instead Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: remove TGSI opcodes PUSHA, POPA, SAD, TXQ_LZMarek Olšák2017-08-2213-129/+23
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: emit VGT_REUSE_OFF in the right placeMarek Olšák2017-08-222-8/+9
| | | | | | | clip_regs aren't marked dirty when writes_viewport_index is changed. Cc: 17.2 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add support for TGSI opcodes DCEIL, DFLR, DROUND, DSSG, DTRUNCMarek Olšák2017-08-222-1/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use a faster version of PK2HMarek Olšák2017-08-221-21/+8
| | | | | | | + 4 piglit regressions, but it's correct accorcing to the GL spec and performance is more important than piglit. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't decompress Z/S if there is no HTILEMarek Olšák2017-08-221-12/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add helpers for whether HTILE is enabledMarek Olšák2017-08-227-18/+27
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't flush L2 metadata for DB if not neededMarek Olšák2017-08-223-11/+26
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't flush L2 metadata for CB if not neededMarek Olšák2017-08-224-17/+38
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't flush TC L2 between rendering and texturing if not neededMarek Olšák2017-08-223-34/+47
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: use correct TC flush flags when invalidating CB & DBMarek Olšák2017-08-221-7/+21
| | | | | | Now we can finally stop flushing L2 data. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't use GS scenario A for VS writing ViewportIndexMarek Olšák2017-08-221-7/+3
| | | | | | Vulkan doesn't do it anymore. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: clean up EOP_DATA_SEL magic numbersMarek Olšák2017-08-223-6/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set 'not a query' for r600_gfx_write_event_eop correctlyMarek Olšák2017-08-223-3/+5
| | | | | | 0 is PIPE_QUERY_OCCLUSION_COUNTER, which is not what we want. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: prevent shader-db crashesMarek Olšák2017-08-221-1/+11
| | | | | | | - don't precompile LS and ES (they don't exist on GFX9), compile as VS instead - don't precompile HS and GS (we don't have LS and ES parts) Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: properly handle imported textures with unexpected swizzle modeMarek Olšák2017-08-221-6/+3
| | | | | Cc: 17.2 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove Constant Engine supportMarek Olšák2017-08-2216-618/+38
| | | | | | | | We have come to the conclusion that it doesn't improve performance. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add a temporary workaround for a tessellation driver bugMarek Olšák2017-08-221-1/+5
| | | | | | | | | The workaround will do for now. The root cause is still unknown. This fixes new piglit: 16in-1out Cc: 17.1 17.2 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: try to re-use previously deleted bindless descriptor slotsSamuel Pitoiset2017-08-222-7/+31
| | | | | | | | Currently, when the array is full it is resized but it can grow over and over because we don't try to re-use descriptor slots. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use slot indexes for bindless handlesSamuel Pitoiset2017-08-224-229/+187
| | | | | | | | | | | | | | | Using VRAM address as bindless handles is not a good idea because we have to use LLVMIntToPTr and the LLVM CSE pass can't optimize because it has no information about the pointer. Instead, use slots indexes like the existing descriptors. Note that we use fixed 16-dword slots for both samplers and images. This doesn't really matter because no real apps use image handles. This improves performance with DOW3 by +7%. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_emit_global_shader_pointers() helperSamuel Pitoiset2017-08-221-26/+31
| | | | | | | To share common code between rw buffers and bindless descriptors. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: only initialize dirty_mask when CE is usedSamuel Pitoiset2017-08-221-3/+4
| | | | | | | | | Looks like it's useless to initialize that field when CE is unused. This will also allow to declare more than 64 elements for the array of bindless descriptors. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: make some si_descriptors fields 32-bitSamuel Pitoiset2017-08-221-5/+5
| | | | | | | | The number of bindless descriptors is dynamic and we definitely have to support more than 256 slots. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: declare new user SGPR indices for bindless samplers/imagesSamuel Pitoiset2017-08-223-1/+23
| | | | | | | | | A new pair of user SGPR is needed for loading the bindless descriptors from shaders. Because the descriptors are global for all stages, there is no need to add separate indices for GFX9. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: add new module that allocate "numbers"Samuel Pitoiset2017-08-223-0/+160
| | | | | | | | Will be used for allocating bindless descriptor slots for RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/gfx9: add performance countersNicolai Hähnle2017-08-221-1/+28
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: extract common code of si_upload_{graphics,compute}_shader_descriptorsNicolai Hähnle2017-08-221-19/+8
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: remove unused PIPE_DUMP_* definesNicolai Hähnle2017-08-223-25/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
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