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* r300g: replace r300_get_num_samples with a util variantMarek Olšák2014-10-211-25/+1
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* gallium: add PIPE_SHADER_CAP_MAX_OUTPUTS and use it in st/mesaMarek Olšák2014-10-2115-0/+32
| | | | | | | | With 5 shader stages and various combinations of enabled and disabled shaders, the maximum number of outputs in one shader doesn't have to be equal to the maximum number of inputs in the following shader. v2: return 32 for softpipe and llvmpipe
* vc4: Fix SRC_ALPHA_SATURATE blending.Eric Anholt2014-10-211-3/+11
| | | | Fixes glean blendFunc.
* vc4: Fix stencil writemask handling.Eric Anholt2014-10-211-2/+2
| | | | | | | If the writemask doesn't compress, then we want to put in the uncompressed writemask, not the compressed writemask failure value (all-on). Fixes glean's stencil2 and fbo-clear-formats on stencil.
* vc4: Don't look at back stencil state unless two-sided stencil is enabled.Eric Anholt2014-10-211-2/+6
| | | | | Fixes regressions in the next bugfix, because gallium util stuff leaves the back stencil state as 0 if !back->enabled.
* freedreno/ir3: add debug flag to disable cpRob Clark2014-10-204-1/+10
| | | | | | FD_MESA_DEBUG=nocp will disable copy propagation pass. Signed-off-by: Rob Clark <[email protected]>
* freedreno: positions come out as integers, not half-integersIlia Mirkin2014-10-201-2/+2
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: disable early-z when we have kill'sRob Clark2014-10-203-0/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix potential gpu lockup with killRob Clark2014-10-204-2/+61
| | | | | | | | It seems like the hardware is unhappy if we execute a kill instruction prior to last input (ei). Probably the shader thread stops executing and the end-input flag is never set. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: comment + better fxn nameRob Clark2014-10-201-3/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: only emit dirty constsRob Clark2014-10-202-5/+9
| | | | | | | | If app only updates (for example) vertex uniforms, it would be nice to only re-emit those and not also frag uniforms. Means we need to mark the first frag shader const buffer dirty after a clear. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: more layer/level fixesRob Clark2014-10-203-8/+14
| | | | Signed-off-by: Rob Clark <[email protected]>
* clover: Don't return CL_INVALID_VALUE if there is no header.EdB2014-10-201-1/+1
| | | | Reviewed-by: Francisco Jerez <[email protected]>
* clover: Add allow_empty_tag.EdB2014-10-201-0/+18
| | | | | | To allow empty objs() list checks. Reviewed-by: Francisco Jerez <[email protected]>
* clover: Add initial implementation of clCompileProgram for CL 1.2.EdB2014-10-207-16/+77
| | | | | | [ Francisco Jerez: General clean-up. ] Reviewed-by: Francisco Jerez <[email protected]>
* clover: Add a simple compat::pair.EdB2014-10-201-0/+9
| | | | | | std::pair is not c++98/c++11 safe. Reviewed-by: Francisco Jerez <[email protected]>
* clover/util: Allow using key_equals with pair-like objects other than std::pair.Francisco Jerez2014-10-201-2/+2
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* clover/util: Define equality operators for a couple of compat classes.Francisco Jerez2014-10-201-13/+30
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* clover/util: Fix construction of compat::vector with a general container as ↵Francisco Jerez2014-10-201-2/+4
| | | | argument.
* vc4: Translate 4-byte index buffers to 2 bytes.Eric Anholt2014-10-194-10/+92
| | | | Fixes assertion failures in 14 piglit tests (half of which now pass).
* vc4: Add support for rebasing texture levels so firstlevel == 0.Eric Anholt2014-10-195-3/+83
| | | | | | GLES2 doesn't have GL_TEXTURE_BASE_LEVEL, so the hardware doesn't. Fixes piglit levelclamp, tex-miplevel-selection, and texture-storage/2D mipmap rendering.
* vc4: Apply a Newton-Raphson step to improve RSQEric Anholt2014-10-181-2/+20
| | | | Fixes all the piglit built-in-functions/*sqrt tests, among others.
* vc4: Apply a Newton-Raphson step to improve RCP.Eric Anholt2014-10-181-1/+17
| | | | Fixes all the piglit floating-point *-op-div tests, among others.
* vc4: Add a little bit more packet parsing to make dump reading easier.Eric Anholt2014-10-181-19/+114
| | | | | Probably should have done this *before* staring at all those render lists today.
* vc4: Make some assertions about how many flushes/EOFs the simulator sees.Eric Anholt2014-10-174-9/+26
| | | | This caught the previous commit's bug in the kernel validator.
* vc4: Fix accidental dropping of the low bits of the store tilebuffer packet.Eric Anholt2014-10-171-3/+5
| | | | | | Notably this included the EOF flag (the other bits are the full buffer dump selection, but we don't do full dumps), which caused the kernel checking for frame completion to trigger.
* vc4: Set the primitive list format at the start of rendering.Eric Anholt2014-10-172-0/+15
| | | | | | | | The other driver does this manually before calling into each tile, but we can just let it get binned into the tiles (saving repeated kernel validation on the packet). Fixes simulator assertion failures on polygon-mode and non-auto texwrap.
* vc4: Replace the FLUSH_ALL with FLUSH.Eric Anholt2014-10-171-1/+3
| | | | | | We don't need to emit all of our current state at the end of each bin list. We're going to be smashing it all at the start of the next tile's bin list, anyway.
* vc4: Add some comments about state management.Eric Anholt2014-10-172-0/+11
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* vc4: Make sure there's exactly 1 tile store per tile coords packet.Eric Anholt2014-10-171-15/+64
| | | | | | It's not documented that I can see, but the other driver does it (check vg_hw_4.c), and one of the HW guys confirmed that you really do need to do it.
* winsys/radeon: Use a single buffer cache manager againMichel Dänzer2014-10-173-37/+21
| | | | | | | | | | The trick is to generate a unique buffer usage value for each possible combination of domains and flags, with only one bit set each for the domains and flags. This ensures pb_check_usage() only returns TRUE when the domains and flags the cached buffer was created for exactly match the requested ones. Reviewed-by: Marek Olšák <[email protected]>
* clover: Add environment variables for dumping kernel code v2Tom Stellard2014-10-161-11/+75
| | | | | | | | | | | | | | | | | | | There are two debug variables: CLOVER_DEBUG which you can set to any combination of llvm,clc,asm (separated by commas) to dump llvm IR, OpenCL C, and native assembly. CLOVER_DEBUG_FILE which you can set to a file name for dumping output instead of stderr. If you set this variable, the output will be split into three separate files with different suffixes: .cl for OpenCL C, .ll for LLVM IR, and .asm for native assembly. Note that when data is written, it is always appended to the files. v2: - Code cleanups - Add CLOVER_DEBUG_FILE environment variable for dumping to a file. Reviewed-by: Francisco Jerez <[email protected]>
* clover: Register an llvm diagnostic handler v3Tom Stellard2014-10-161-0/+25
| | | | | | | | | | | | This will allow us to handle internal compiler errors. v2: - Code cleanups. v3: - More cleanups. Reviewed-by: Francisco Jerez <[email protected]>
* clover: Add support for compiling to native object code v3Tom Stellard2014-10-162-9/+204
| | | | | | | | | | | v2: - Split build_module_native() into three separate functions. - Code cleanups. v3: - More cleanups. Reviewed-by: Francisco Jerez <[email protected]>
* gallium: Add PIPE_SHADER_IR_NATIVE to enum pipe_shader_irTom Stellard2014-10-162-3/+4
| | | | | | | Drivers can return this value for PIPE_COMPUTE_CAP_IR_TARGET if they want clover to give them native object code. Reviewed-by: Francisco Jerez <[email protected]>
* clover: Factor kernel argument parsing into its own function v2Tom Stellard2014-10-161-81/+92
| | | | | | | v2: - Code cleanups. Reviewed-by: Francisco Jerez <[email protected]>
* vc4: correctly include the source filesEmil Velikov2014-10-162-3/+1
| | | | | | | | | The kernel files are built into a separate static library and all the functions that require it are already wrapped in ifdef USE_VC4_SIMULATOR. Don't forget the header file :) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/ir3: large const supportRob Clark2014-10-155-13/+33
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-10-154-5/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix layer_strideRob Clark2014-10-151-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: inline fd_draw_emit()Rob Clark2014-10-152-49/+47
| | | | | | Manual LTO Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: optimize shader key comparisionRob Clark2014-10-155-40/+79
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: refactor/optimize emitRob Clark2014-10-157-83/+125
| | | | | | | | | | | | | Because we reuse various bits of emit code (for state/vertex/prog/etc) for both regular draws and internal draws (gmem<->mem, clear, etc), the number of parameters getting passed around has been growing. Refactor to group these into fd3_emit. This simplifies fxn signatures, avoids passing around shader key on the stack, etc. It also gives us a nice place to cache shader-variant lookup to avoid looking up shader variants multiple times per draw (without having to *also* pass them around as fxn args everywhere). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: refactor vertex state emitRob Clark2014-10-1511-79/+83
| | | | | | | | | | | | | | Get rid of fd3_vertex_buf and use fd_vertex_state directly for all draws. Removes a tiny bit of CPU overhead for munging around the vertex state every time it is emitted, but more importantly it cleans things up for later optimizations, so the emit paths don't have to special case internal draws (gmem<->mem, clears, etc) with regular draws. Instead of constructing fd3_vertex_buf array each time for internal draws, and context init time pre-create solid_vbuf_state and blit_vbuf_state. Signed-off-by: Rob Clark <[email protected]>
* vc4: Fix the uniform debug output.Eric Anholt2014-10-151-1/+1
| | | | | I dropped the shader index when moving to the compiled shader struct, but didn't update the format string here.
* vc4: Add support for user clip plane and gl_ClipVertex.Eric Anholt2014-10-155-4/+91
| | | | Fixes about 15 piglit tests about interpolation and clipping.
* vc4: Move the output semantics setup to a helper.Eric Anholt2014-10-151-16/+28
| | | | I want to reuse it elsewhere to set up outputs that aren't in the TGSI.
* r600g,radeonsi: Only set use_staging_texture = TRUE onceMichel Dänzer2014-10-151-8/+5
| | | | | | No need to check for setting the flag after we set it already. Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: Use staging texture for transfers if any miplevel is tiledMichel Dänzer2014-10-151-1/+1
| | | | | | | We set the NO_CPU_ACCESS flag for BO allocation in that case, so direct CPU access may not work. Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: Use separate caching buffer manager for each set of flagsMichel Dänzer2014-10-153-41/+32
| | | | | | | | Otherwise the caching buffer manager may return a buffer which was created with a different set of flags, which can cause trouble. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
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