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* python/tests: Fixed tri.py for API and TGSI syntax changes.Tilman Sauerbeck2010-09-201-4/+4
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Implemented the Z and W component write for the SCS opcode.Tilman Sauerbeck2010-09-201-0/+49
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Honour destination operand's writemask in the SCS implementation.Tilman Sauerbeck2010-09-201-26/+35
| | | | | | | If we are not going to write to the X or Y components of the destination vector we also don't need to prepare to compute SIN or COS. Signed-off-by: Tilman Sauerbeck <[email protected]>
* softpipe: fix whitespaceLuca Barbieri2010-09-201-2/+2
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* tgsi: add switch/case opcodes to tgsi_opcode_tmp.hLuca Barbieri2010-09-201-0/+4
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* softpipe: make z/s test always pass if no zsbuf, instead of crashingLuca Barbieri2010-09-201-2/+6
| | | | D3D10 specifies this.
* gallium: avoid the C++ keyword "template" in sw_winsys.hLuca Barbieri2010-09-201-1/+1
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* gallivm: remove debug codeBrian Paul2010-09-201-2/+0
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* llvmpipe: fix query bug when no there's no sceneBrian Paul2010-09-201-2/+3
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* r600g: move chip class to radeon common structureJerome Glisse2010-09-2014-75/+100
| | | | | | | So texture code can be shared btw new state design & old one. Signed-off-by: Jerome Glisse <[email protected]>
* i915g: Link with wrapper sw winsys with sconsJakob Bornecrantz2010-09-201-0/+1
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* svga: Integer constant register file has a separate namespace.Michal Krol2010-09-203-8/+9
| | | | | | Count int and float constants independently. Since there are only few i# constants available and hundreds of c# constants, it would be too easy to end up with an i# declaration out of its range.
* svga: Fix relative addressing translation for pixel shaders.Michal Krol2010-09-201-14/+37
| | | | | | | | | | | | Pixel shaders do not have address registers a#, only one loop register aL. Our only hope is to assume the address register is in fact a loop counter and replace it with aL. Do not translate ARL instruction for pixel shaders -- MOVA instruction is only valid for vertex saders. Make it more explicit relative addressing of inputs is only valid for pixel shaders and constants for vertex shaders.
* r600g: Cleanup viewport floats.Corbin Simpson2010-09-191-10/+23
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* r600g: Clean up PS setup.Corbin Simpson2010-09-192-16/+25
| | | | | I didn't do r600d according to the docs; I split EXPORT_MODE to be a bit more useful and obvious. Hope this is okay.
* r600g: only flush for the correct colorbuffer, not all of them.Dave Airlie2010-09-201-2/+4
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* r600g: add missing BC_INST wrapper for evergreenDave Airlie2010-09-201-1/+1
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* r600g: fixup r700 CB_SHADER_CONTROL register.Dave Airlie2010-09-203-35/+36
| | | | r600c emits this with a mask of each written output.
* r600g: fix r700 cube map sizing.Dave Airlie2010-09-201-4/+9
| | | | this fixes fbo-cubemap on r700.
* r600g: add color/texture support for more depth formats.Dave Airlie2010-09-203-2/+20
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* r600g: add z16 to color setupDave Airlie2010-09-202-0/+13
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* r600g: fix tiling support for ddx supplied buffersDave Airlie2010-09-201-9/+9
| | | | needed to emit some more relocs to the kernel.
* r600g: "tmp" is such a bad name for a texture.Corbin Simpson2010-09-191-10/+10
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* r600g: Fix false and true.Corbin Simpson2010-09-198-17/+17
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* r600g: Clean up some indentation and |= vs. | usage.Corbin Simpson2010-09-191-21/+22
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* r600g: Deobfuscate and comment a few more functions in r600_hw_states.Corbin Simpson2010-09-192-11/+66
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* r600g: Trivially deobfuscate r600_hw_states.Corbin Simpson2010-09-191-20/+40
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* r600g: Use align() instead of handrolled code.Corbin Simpson2010-09-193-6/+3
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* r600g: drop debugging that snuck inDave Airlie2010-09-201-1/+0
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* r600g: clean up valgrind issues on maxtargets test.Dave Airlie2010-09-201-1/+7
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* r600g: fix fbo-drawbuffers-maxtargetsDave Airlie2010-09-202-8/+26
| | | | | | | we were leaking buffers since the flush code was added, it wasn't dropping references. move setting up flush to the set_framebuffer_state. clean up the flush state object. make more space in the BOs array for flushing.
* r600g: send correct surface base update for multi-cbufsDave Airlie2010-09-201-2/+4
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* r600g: modify index buffers for sizes the hw can't deal with.Dave Airlie2010-09-201-2/+37
| | | | this just uses the common code from r300g now in util to do translations on r600g.
* util/r300g: split the r300 index buffer modifier functions out to utilDave Airlie2010-09-205-108/+174
| | | | | | These can be used by other drivers, like r600g. Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix exports_ps to export a number not a mask.Henri Verbeet2010-09-202-2/+2
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* scons: Link against talloc in the Gallium DRI driversJakob Bornecrantz2010-09-201-0/+1
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* rbug: Add function to get opcode name stringJakob Bornecrantz2010-09-202-0/+69
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* rbug: Cast opcode to corrent int sizeJakob Bornecrantz2010-09-204-28/+28
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* Revert "r600g: Flush upload buffers before draws instead of before flushes."Henri Verbeet2010-09-192-5/+4
| | | | | | | This reverts commit a1d9a58b825825723f1c5f7705f2ed3ef834038a. Flushing the upload buffers on draw is wrong, uploads aren't supposed to cause flushes in the first place. The real issue was radeon_bo_pb_map_internal() not respecting PB_USAGE_UNSYNCHRONIZED.
* r600g: Respect PB_USAGE_UNSYNCHRONIZED in radeon_bo_pb_map_internal().Henri Verbeet2010-09-191-0/+8
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* gallium/docs: Fixed a typo in the SCS opcode description.Tilman Sauerbeck2010-09-191-1/+1
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* auxiliary: fix depth-only and stencil-only clearsLuca Barbieri2010-09-191-1/+1
| | | | | | | Depth-only and stencil-only clears should mask out depth/stencil from the output, mask out stencil/input from input, and OR or ADD them together. However, due to a typo they were being ANDed, resulting in zeroing the buffer.
* r600g: Buffer object maps imply a wait.Henri Verbeet2010-09-196-42/+13
| | | | Unless e.g. PB_USAGE_DONTBLOCK or PB_USAGE_UNSYNCHRONIZED would be specified.
* r600g: Remove a redundant flush in r600_texture_transfer_map().Henri Verbeet2010-09-191-1/+0
| | | | radeon_ws_bo_map() will already take care of that if needed.
* r600g: Check for other references before checking for existing mappings in ↵Henri Verbeet2010-09-191-6/+8
| | | | | | | radeon_bo_pb_map_internal(). Having a non-NULL data pointer doesn't imply it's safe to reuse that mapping, it may have been unmapped but not flushed yet.
* r600g: Flush upload buffers before draws instead of before flushes.Henri Verbeet2010-09-192-4/+5
| | | | | | | | | | If a upload buffer is used by a previous draw that's still in the CS, accessing it would need a context flush. However, doing a context flush when mapping the upload buffer would then flush/destroy the same buffer we're trying to map there. Flushing the upload buffers before a draw avoids both the CS flush and the upload buffer going away while it's being used. Note that u_upload_data() could e.g. use a pool of buffers instead of allocating new ones all the time if that turns out to be a significant issue.
* st/egl: s/kms/drm/ on the drm backend.Chia-I Wu2010-09-193-303/+303
| | | | s/kms/drm/, s/kdpy/drmdpy/, and so forth.
* st/egl: Rename kms backend to drm.Chia-I Wu2010-09-196-19/+19
| | | | | The main use of the backend is to support EGL_MESA_drm_display. drm should be a better name.
* st/egl: Split modeset code support to modeset.c.Chia-I Wu2010-09-193-587/+647
| | | | | The modeset code supports now obsolete EGL_MESA_screen_surface. Move it to a file of its own.
* r600g: only emit uses waterfall on r6xx hw.Dave Airlie2010-09-191-1/+1
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