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* swr: support samplers in vertex shadersTim Rowley2016-04-126-105/+228
| | | | Reviewed-by: George Kyriazis <[email protected]>
* radeonsi: enable GLSL 4.20 and therefore OpenGL 4.2Nicolai Hähnle2016-04-121-1/+2
| | | | | | | This is the last necessary bit for OpenGL 4.2 support. All driver-specific functionality has already been implemented as part of extensions. Reviewed-by: Edward O'Callaghan <[email protected]>
* va: check null context in vlVaDestroyContextIurie Salomov2016-04-131-0/+4
| | | | | Signed-off-by: Iurie Salomov <[email protected]> Reviewed-by: Julien Isorce <[email protected]>
* radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was addedMarek Olšák2016-04-132-9/+2
| | | | | For some reason unknown to me, SI hangs if the event is written after CONTEXT_CONTROL.
* radeonsi: fix bounds check in si_create_vertex_elementsNicolai Hähnle2016-04-121-1/+1
| | | | | | | | | This was triggered by dEQP-GLES3.functional.vertex_array_objects.all_attributes Cc: "11.1 11.2" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable shader buffer pipe capsNicolai Hähnle2016-04-121-2/+2
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: add shader buffer support to TGSI_OPCODE_RESQNicolai Hähnle2016-04-121-6/+11
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: add shader buffer support to TGSI_OPCODE_STORENicolai Hähnle2016-04-121-18/+111
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: add shader buffer support to TGSI_OPCODE_LOADNicolai Hähnle2016-04-121-19/+70
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: add shader buffer support to TGSI_OPCODE_ATOM*Nicolai Hähnle2016-04-121-15/+46
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: add offset parameter to buffer_append_argsNicolai Hähnle2016-04-121-5/+10
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: adjust buffer_append_args to take a 128 bit resourceNicolai Hähnle2016-04-121-7/+23
| | | | | | | Move the buffer resource extraction code out into its own function. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: preload shader buffers in shadersNicolai Hähnle2016-04-121-0/+17
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: implement set_shader_buffersNicolai Hähnle2016-04-125-58/+125
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: move resetting of constant buffers into a separate functionNicolai Hähnle2016-04-121-15/+26
| | | | | | | This will be re-used for shader buffers. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: Mark ARB_robust_buffer_access_behavior as supported.Bas Nieuwenhuizen2016-04-121-1/+1
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add capability for ARB_robust_buffer_access_behavior.Bas Nieuwenhuizen2016-04-1217-0/+21
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* swr: [rasterizer core] warning cleanupTim Rowley2016-04-122-5/+4
| | | | Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer] Put in rudimentary garbage collection for the global arena ↵Tim Rowley2016-04-123-61/+187
| | | | | | | | | | | allocator - Check for unused blocks every few frames or every 64K draws - Delete data unused since the last check if total unused data is > 20MB Doesn't seem to cause a perf degridation Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer core] Put DRAW_CONTEXT on a dietTim Rowley2016-04-127-49/+43
| | | | | | No need for 256 pointers per DC. Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer core] Add experimental support for hyper-threaded front-endTim Rowley2016-04-125-56/+139
| | | | Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer] Avoid segv in thread creation on machines with ↵Tim Rowley2016-04-121-0/+4
| | | | | | non-consecutive NUMA topology. Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer core] Replace all naked OSALIGN macro uses with OSALIGNSIMD ↵Tim Rowley2016-04-124-14/+14
| | | | | | | | / OSALIGNLINE Future proofing Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer] Ensure correct alignment of stack variables used as vectorsTim Rowley2016-04-122-3/+4
| | | | Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer core] Quantize depth to depth buffer precision prior to ↵Tim Rowley2016-04-125-13/+81
| | | | | | | | depth test/write. Fixes z-fighting issues. Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer common] win32 build fixupsTim Rowley2016-04-121-6/+0
| | | | Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer core] Affinitize thread scratch space to numa node of workerTim Rowley2016-04-123-4/+16
| | | | Acked-by: Brian Paul <[email protected]>
* swr: [rasterizer] Misc fixes identified by static code analysisTim Rowley2016-04-124-6/+21
| | | | | | No perf loss detected Acked-by: Brian Paul <[email protected]>
* gallium: Use STATIC_ASSERT whenever possible.Jose Fonseca2016-04-123-3/+3
| | | | | Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* softpipe: Use STATIC_ASSERT whenever possible.Jose Fonseca2016-04-121-2/+2
| | | | | Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* svga: Use STATIC_ASSERT whenever possible.Jose Fonseca2016-04-123-7/+7
| | | | | Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* r600g: use common scissor and viewport codeMarek Olšák2016-04-126-209/+34
| | | | | | | | It's the same as radeonsi. This adds guard band support to r600g. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add R600/Evergreen/Cayman support to common viewport codeMarek Olšák2016-04-123-17/+50
| | | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move scissor and viewport states into gallium/radeonMarek Olšák2016-04-1212-319/+388
| | | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use guard band clippingMarek Olšák2016-04-121-4/+69
| | | | | | | | | | | | Guard band clipping speeds up rasterization for primitives that are partially off-screen. This change in particular results in small framerate improvements in a wide range of games. Started by Grigori Goronzy <[email protected]>. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: compute scissor from viewport in set_viewport_statesMarek Olšák2016-04-122-30/+48
| | | | | | | | | and clamp it right before emitting. This is a prerequisite for computing the guard band. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: set GTT WC on tiled texturesMarek Olšák2016-04-121-1/+2
| | | | | | | | Just for consistency. This should have no effect, because OpenGL textures always go to VRAM. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium/radeon: relax requirements on VRAM placements on APUsMarek Olšák2016-04-124-0/+37
| | | | | | | This makes Tonga with vramlimit=128 2x faster in Heaven. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* winsys/amdgpu: remove hack for low VRAM configurationMarek Olšák2016-04-121-10/+0
| | | | | | | A better solution will be used. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* r600g: disable aniso filtering for non-mipmap textures on EGMarek Olšák2016-04-121-1/+3
| | | | | | this is the default behavior of the closed driver when running on VI Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: clean up aniso state translationMarek Olšák2016-04-126-31/+29
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: disable aniso filtering for non-mipmap textures on SI-CIMarek Olšák2016-04-122-1/+45
| | | | | | | | | The closed driver does this, but it looks at base_level and last_level and uses a conditional assignment, which LLVM can't generate on SGPRs. That led me to invent this solution that abuses the image descriptor. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: clean up aniso state translationMarek Olšák2016-04-123-15/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enable some sampler fields to match the closed driverMarek Olšák2016-04-122-2/+10
| | | | | | copied from the Vulkan driver Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix maximum texture anisotropy setupMarek Olšák2016-04-121-5/+9
| | | | | | We were overdoing it for non-power-of-two values. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: never choose a linear tiling for DB surfacesMarek Olšák2016-04-121-7/+6
| | | | | | | Just for consistency. This is actually not a problem, because both addrlib and radeon check and fix this. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: removing dead code for sharing stencil buffersMarek Olšák2016-04-121-4/+0
| | | | | | | This is a remnant of the times when the DDX was allocating depth-stencil buffers for windows. Now, st/dri allocates them and doesn't share them. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: allow clearing buffers >= 4 GBMarek Olšák2016-04-124-7/+7
| | | | | | | Only CMASK and DCC clears can use this, because only textures can be so large. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: allow allocating textures >= 4 GBMarek Olšák2016-04-123-14/+17
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/radeon: fix printing allocation failuresMarek Olšák2016-04-121-4/+4
| | | | | | print as unsigned instead of signed Reviewed-by: Nicolai Hähnle <[email protected]>
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