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* targets/opencl: don't hardcode the icd file install to /etc/...Emil Velikov2017-11-081-1/+1
* gallivm: Use new LLVM fast-math-flags APITobias Droste2017-11-081-0/+4
* amd/addrlib: update to latest versionMarek Olšák2017-11-081-1/+0
* braodcom/vc5: Flush the job when it grows over 1GB.Eric Anholt2017-11-073-0/+10
* broadcom/vc5: Fix pausing of transform feedback.Eric Anholt2017-11-071-1/+1
* broadcom/vc5: Add support for GL_RASTERIZER_DISCARDEric Anholt2017-11-071-0/+2
* broadcom/vc5: Add partial transform feedback query support.Eric Anholt2017-11-073-17/+64
* broadcom/vc5: Add occlusion query support.Eric Anholt2017-11-076-20/+121
* broadcom/vc5: Skip emitting textures that aren't used.Eric Anholt2017-11-071-2/+4
* broadcom/vc5: Add missing SRGBA8 ETC2 support.Eric Anholt2017-11-071-0/+1
* broadcom/vc5: Disable early Z test when the FS writes Z.Eric Anholt2017-11-071-1/+2
* broadcom/vc5: Shift the min/max lod fields by the BASE_LEVEL.Eric Anholt2017-11-072-4/+15
* broadcom/vc5: Add support for anisotropic filtering.Eric Anholt2017-11-071-0/+9
* broadcom/vc5: Fix mipmap filtering enums.Eric Anholt2017-11-071-6/+8
* broadcom/vc5: Fix height padding of small UIF slices.Eric Anholt2017-11-071-1/+5
* broadcom/vc5: Print the actual offsets in HW for our resource layout debug.Eric Anholt2017-11-071-34/+55
* broadcom/vc5: Set the available VS outputs to match the FS inputs.Eric Anholt2017-11-071-1/+4
* broadcom/vc5: Set the max texture LOD bias.Eric Anholt2017-11-071-1/+1
* broadcom/vc5: Fix translation of stencil ops.Eric Anholt2017-11-072-8/+30
* broadcom/vc5: Move stencil state packing to the CSO.Eric Anholt2017-11-073-27/+47
* broadcom/vc5: Introduce a helper for pre-packing our V3DXX structs.Eric Anholt2017-11-072-165/+155
* broadcom/vc5: Add a cl_emit() variant for merging with a pre-packed struct.Eric Anholt2017-11-072-19/+29
* broadcom/vc5: Skip emitting depth offset while disabled.Eric Anholt2017-11-071-1/+4
* broadcom/vc5: Don't emit stencil config if not doing stencil test.Eric Anholt2017-11-071-1/+2
* broadcom/vc5: Don't emit updated blend factors/funcs while disabled.Eric Anholt2017-11-071-1/+5
* broadcom/vc5: Make sure the TMU indirect struct is appropriately aligned.Eric Anholt2017-11-071-0/+2
* broadcom/vc5: Use DEPTH24_STENCIL8 for rendering to depth-only textures.Eric Anholt2017-11-071-1/+1
* radeonsi: add si_screen::has_ls_vgpr_init_bugMarek Olšák2017-11-074-3/+5
* radeonsi: use ac_create_target_machineMarek Olšák2017-11-071-15/+7
* radeonsi: use ac_get_llvm_processor_nameMarek Olšák2017-11-073-38/+4
* radeonsi/gfx9: don't set gs_table_depthMarek Olšák2017-11-071-2/+4
* radeonsi/gfx9: limit the scissor bug workaround to Vega10 and Raven onlyMarek Olšák2017-11-071-4/+4
* radeonsi: remove unused field in the PCI ID tableMarek Olšák2017-11-071-1/+1
* gallium: Guard assertions by NDEBUG instead of DEBUGMichel Dänzer2017-11-071-1/+1
* meson: standardize .so version to major.minor.patchEric Engestrom2017-11-071-1/+1
* drisw: Enable flush control for llvmpipe and softpipeAdam Jackson2017-11-061-0/+1
* gallium: Wire up flush controlAdam Jackson2017-11-062-1/+6
* dri: Change __DriverApiRec::CreateContext to take a struct for attribsNeil Roberts2017-11-062-28/+24
* etnaviv: Don't over-pad compressed texturesWladimir J. van der Laan2017-11-061-9/+15
* etnaviv: ASTC texture supportWladimir J. van der Laan2017-11-067-2/+57
* etnaviv: Update from rnndbWladimir J. van der Laan2017-11-0613-320/+1015
* gallium/u_vbuf: use signed vertex buffers offsets for optimal uploadsMarek Olšák2017-11-061-2/+10
* radeonsi: enable signed vertex buffer offsetsMarek Olšák2017-11-062-15/+12
* gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSETMarek Olšák2017-11-0618-0/+21
* radeonsi: don't map big VRAM buffers for the first upload directlyMarek Olšák2017-11-062-0/+21
* gallium/u_threaded: don't map big VRAM buffers for the first upload directlyMarek Olšák2017-11-063-2/+28
* gallium/u_threaded: clean up tc_improve_map_buffer_flags and prevent reentryMarek Olšák2017-11-061-7/+12
* nv50,nvc0: Display shared memory usage in pipe_debug_messagePierre Moreau2017-11-042-6/+8
* nv50,nvc0: Copy shared memory per block to the program info structure and backPierre Moreau2017-11-042-0/+4
* nv50/ir: Store shared memory per block in nv50_ir_prog_infoPierre Moreau2017-11-041-0/+1
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