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* freedreno: fix crash if ctx torn down with no renderingRob Clark2017-04-171-1/+1
* freedreno/ir3: add 'high' register classRob Clark2017-04-173-67/+131
* freedreno: extract helper for stage->sb for a4xx+Rob Clark2017-04-175-28/+29
* freedreno/{a4xx,a5xx}: switch to CP_LOAD_STATE4Rob Clark2017-04-175-127/+124
* freedreno: update generated headersRob Clark2017-04-178-213/+794
* winsys/amdgpu: init buffer_indices_hashlist with memset()Samuel Pitoiset2017-04-171-8/+2
* winsys/amdgpu: simplify amdgpu_cs_add_buffer() a bitSamuel Pitoiset2017-04-171-4/+3
* gallium/radeon: always flush asynchronously and wait after begin_new_csMarek Olšák2017-04-172-4/+11
* radeonsi: remove local variable 'mod' from si_compile_tgsi_shaderMarek Olšák2017-04-171-5/+2
* radeonsi: add si_shader_selector::vs_needs_prologMarek Olšák2017-04-173-7/+10
* radeonsi: don't set VGT_GS_MODE as part of the GS stateMarek Olšák2017-04-171-2/+0
* radeonsi: don't allow user indices with indirect drawsMarek Olšák2017-04-171-4/+4
* radeonsi: merge two if (indirect) statementsMarek Olšák2017-04-171-27/+25
* radeonsi: don't mark non-dirty textures with CMASK as compressedMarek Olšák2017-04-171-2/+3
* etnaviv: native fence fd supportPhilipp Zabel2017-04-156-6/+82
* swr: Fix swr osmesa buildGeorge Kyriazis2017-04-141-1/+1
* etnaviv: SINGLE_BUFFER support on GC3000Wladimir J. van der Laan2017-04-158-28/+63
* etnaviv: Update includes from rnndbWladimir J. van der Laan2017-04-155-20/+91
* etnaviv: Add chipMinorFeatures4 and 5Wladimir J. van der Laan2017-04-152-1/+15
* etnaviv: resolve tile status when flushing resourcePhilipp Zabel2017-04-152-0/+11
* etnaviv: stop repeatedly resolving an unchanged resource into its scanout pri...Philipp Zabel2017-04-151-1/+4
* swr: Add polygon stipple supportGeorge Kyriazis2017-04-145-9/+84
* radeonsi: add missing initialization for userptr buffersNicolai Hähnle2017-04-141-0/+4
* radeonsi: cope with missing disassemblyNicolai Hähnle2017-04-141-1/+2
* gallium/ddebug: dump missing members of pipe_draw_infoNicolai Hähnle2017-04-142-0/+7
* radeonsi: enable ARB_shader_viewport_layer_arrayNicolai Hähnle2017-04-141-1/+1
* radeonsi: handle ignored LAYER and VIEWPORT_INDEX writesNicolai Hähnle2017-04-141-0/+20
* tgsi: clarify TGSI_SEMANTIC_{LAYER,VIEWPORT_INDEX}Nicolai Hähnle2017-04-141-0/+10
* gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORTNicolai Hähnle2017-04-1417-0/+19
* swr: Enable MSAA in OpenSWR software rendererBruce Cherniak2017-04-146-25/+313
* swr: Removed unnecessary PIPE_BIND flags from swr_is_format_supportedBruce Cherniak2017-04-141-2/+1
* swr: Align swr_context allocation to SIMD alignment.Bruce Cherniak2017-04-141-2/+5
* swr: update gallium driver docsTim Rowley2017-04-142-6/+12
* gallium/docs: small correction about register files for atomicsRob Clark2017-04-141-2/+4
* freedreno: enable draw/batch reordering by defaultRob Clark2017-04-142-3/+3
* freedreno/ir3: small re-orderRob Clark2017-04-141-24/+23
* freedreno/ir3: move 'keeps' to block levelRob Clark2017-04-145-20/+22
* freedreno/ir3: convert dynamic arrays to rallocRob Clark2017-04-143-14/+8
* swr: add linux to scons buildGeorge Kyriazis2017-04-142-7/+2
* st/nine: Fix support for ps 1.4 dw and dz modifiersAxel Davy2017-04-131-2/+2
* clover: Add missing include to compat headerJan Vesely2017-04-131-0/+1
* gallium/radeon: never use staging buffers with AMD_pinned_memoryNicolai Hähnle2017-04-131-2/+16
* radeonsi: fix gl_BaseVertex in non-indexed drawsNicolai Hähnle2017-04-133-4/+23
* radeonsi: provide VS_STATE input to all VS variantsNicolai Hähnle2017-04-135-27/+18
* radeonsi: change the bit-packing of LS out/TCS in dataNicolai Hähnle2017-04-133-9/+14
* radeonsi: emit VS_STATE register explicitly from si_draw_vboNicolai Hähnle2017-04-136-2/+27
* radeonsi: extract derived tess state emit to higher levelNicolai Hähnle2017-04-131-6/+7
* radeonsi: drop support for TGSI_SEMANTIC_VERTEXID_NOBASENicolai Hähnle2017-04-131-2/+3
* gallium/hud: set the dump file streams to line bufferedEdmondo Tommasina2017-04-131-0/+2
* svga: remove unused vmw_dri1_intersect_src_bbox()Samuel Pitoiset2017-04-131-32/+0
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