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* i915g: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+3
| | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
* i915g: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-1/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* llvmpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* llvmpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-3/+3
| | | | | | v2: Changed allocation alignment of llvmpipe_displaytarget_layout. Reviewed-by: Ian Romanick <[email protected]>
* softpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* softpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-2/+2
| | | | | | v2: Changed allocation alignment in softpipe_displaytarget_layout. Reviewed-by: Ian Romanick <[email protected]>
* i915g: support more PIPE_CAPsStéphane Marchesin2014-01-281-3/+6
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* radeonsi: Put GS ring buffer descriptors with streamout buffer descriptorsMichel Dänzer2014-01-295-84/+115
| | | | | | And mark the constant buffers as read only for the GPU again. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Enable OpenGL 3.3Michel Dänzer2014-01-291-3/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Geometry shader micro-optimizationsMichel Dänzer2014-01-291-12/+10
| | | | | | | | Move parameter loads out of loops, and use the instruction offset instead of a VGPR for the vertex attribute offset when writing to the ESGS ring buffer. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: We don't support indirect addressing of geometry shader inputsMichel Dänzer2014-01-291-0/+4
| | | | | | Fixes piglit spec/glsl-1.50/execution/geometry/dynamic_input_array_index Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Pass VS resource descriptors to the HW ES shader stage as wellMichel Dänzer2014-01-296-34/+58
| | | | | | | This makes sure constants and samplers work in the vertex shader even when a geometry shader is active. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix streamout from geometry shaderMichel Dänzer2014-01-291-10/+27
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Simplify shader PM4 state handlingMichel Dänzer2014-01-293-61/+21
| | | | | | | | | | Just always bind the current states before drawing. Besides the simplification, as a bonus this makes sure the VS hardware shader stage always uses the GS copy shader when a geometry shader is active, fixing a number of GS related piglit tests. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Properly match ES outputs to GS inputsMichel Dänzer2014-01-291-5/+16
| | | | | | Fixes piglit vs-gs-arrays-within-blocks-pass. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Really dump TGSI code before any TGSI->LLVM conversion attemptMichel Dänzer2014-01-291-8/+8
| | | | | | While we're at it, use the local variable 'sel'. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Also export clip distances with geometry shaderMichel Dänzer2014-01-292-5/+9
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Take GS into account for VS state in more placesMichel Dänzer2014-01-293-2/+14
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Handle adjacency primitivesMichel Dänzer2014-01-291-4/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Handle TGSI_SEMANTIC_PRIMIDMichel Dänzer2014-01-293-2/+16
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Generalize counting of shader parametersMichel Dänzer2014-01-293-38/+48
| | | | | | Now it covers ES->GS as well as VS->PS. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix handling of geometry shader output vertex IDMichel Dänzer2014-01-291-7/+19
| | | | | | | | | It needs to increment at shader runtime, not at shader compile time, as the geometry shader can emit vertices in loops. LLVM automagically converts the ID back to an immediate value if its value can be determined at compile time. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Initial geometry shader supportMichel Dänzer2014-01-2911-191/+1084
| | | | | | | Partly based on the corresponding r600g work by Vadim Girlin and Dave Airlie. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Refactor shader input / output handling codeMichel Dänzer2014-01-291-218/+268
| | | | | | In preparation for adding geometry shader support. Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: Don't set resource_create in r600_common_screen_init()Tom Stellard2014-01-282-1/+1
| | | | | | | | r600g and radeonsi have different implementations of resource_create. https://bugs.freedesktop.org/show_bug.cgi?id=74139 Reviewed-by: Marek Olšák <[email protected]>
* gallivm: Workaround http://llvm.org/PR18600José Fonseca2014-01-281-2/+4
| | | | | | | | | | | | | | | | | | We have code generation paths that carry out swizzles of AoS vectors via bitwise shifts, as these tend to generate more efficient code than straightforward byte shuffles. But when the input is a constant the additional bitwise arithmetic operations somehow don't really get constant propagated properly, evenutally causing assertion failure in InstCombine pass. Therefore avoid the bug by using the trivial shuffles for constant inputs. Although the sample LLVM IR can cause a crash with any LLVM version, this was only seen in practice with LLVM 3.2. Reviewed-by: Matthew McClure <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* r600g: s/r600_llvm_gpu_string/r600_get_llvm_processor_name/Michel Dänzer2014-01-281-1/+1
| | | | | | Fixes build failure introduced by commit 65dc588bfd3b8145131340ffe77f216be58378ac ('r600g,radeonsi: consolidate get_compute_param'), which consolidated the former into the latter.
* radeonsi: cleanup includes, add missing licenseMarek Olšák2014-01-2812-86/+49
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove open-coded PS_PARTIAL_FLUSH eventMarek Olšák2014-01-281-5/+3
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: move some inline functions from si_pipe.h to si_state.cMarek Olšák2014-01-282-39/+30
| | | | | | | | | And si_tex_aniso_filter is unused. v2: remove INLINE occurences Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove si_resource.hMarek Olšák2014-01-284-50/+13
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove si.hMarek Olšák2014-01-283-45/+5
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: move si_upload_const_buffer to a better placeMarek Olšák2014-01-285-70/+29
| | | | | | | This gets rid of another file. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: inline si_translate_index_bufferMarek Olšák2014-01-284-60/+19
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: inline si_upload_index_bufferMarek Olšák2014-01-283-13/+2
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: consolidate remaining obviously duplicated pipe_screen codeMarek Olšák2014-01-284-57/+30
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: consolidate get_compute_paramMarek Olšák2014-01-287-267/+162
| | | | | | | v2: added fprintf to r600_get_llvm_processor_name Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: consolidate get_paramf and get_video_paramMarek Olšák2014-01-284-118/+70
| | | | | | | | | | radeonsi now reports PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE = true if UVD support isn't available. It's what all the other drivers do. Also, some #include directives were missing in radeon_uvd.h. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: consolidate variables for CS tracingMarek Olšák2014-01-2810-46/+42
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: consolidate get_timestamp, get_driver_query_infoMarek Olšák2014-01-284-41/+34
| | | | | | | This enables more queries for the Gallium HUD with radeonsi. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: consolidate get_name and get_vendor queriesMarek Olšák2014-01-283-74/+50
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon: place context-related functions first in r600_pipe_common.cMarek Olšák2014-01-281-79/+87
| | | | | | | To follow the unwritten convention of r600g and radeonsi. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: consolidate the contents of r600_resource.cMarek Olšák2014-01-2813-163/+45
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: advertise the pipeline statistics queryMarek Olšák2014-01-281-1/+1
| | | | | | | | | | Implemented by the common code. You can now visualize the statistics with the HUD, see GALLIUM_HUD=help for all available queries. For example: GALLIUM_HUD=clipper-primitives-generated Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: use queries from r600gMarek Olšák2014-01-289-757/+40
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g: remove a no-op while loopMarek Olšák2014-01-281-1/+1
| | | | | | | | | | | for (;;) { } while (); I was surprised to see such a statement. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g: convert query emission code to radeon_emitMarek Olšák2014-01-281-50/+50
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g: only emit NOP relocations for queries if VM is disabledMarek Olšák2014-01-283-23/+19
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g: move queries to drivers/radeonMarek Olšák2014-01-2812-239/+282
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* mesa: Change many Type P MESA_FORMATs to meet naming specMark Mueller2014-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conversion of Type P formats as follows (w/related comment fixes): s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g Conflicts: src/mesa/drivers/dri/i965/brw_surface_formats.c src/mesa/main/format_pack.c src/mesa/main/format_unpack.c src/mesa/main/formats.c src/mesa/main/texformat.c src/mesa/main/texstore.c
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 18:51:16 +0000