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* svga: remove unneeded #includes in svga_pipe_draw.cBrian Paul2018-02-011-7/+0
* svga: whitespace/formatting fixes in svga_pipe_draw.cBrian Paul2018-02-011-33/+34
* svga: clean up retry_draw_range_elements(), retry_draw_arrays()Brian Paul2018-02-011-54/+27
* svga: remove unused min/max_index params to draw_vgpu10()Brian Paul2018-02-011-4/+3
* broadcom/vc5: Fix image_h setup for both loads and stores.Eric Anholt2018-02-011-3/+2
* broadcom/vc5: Add appropriate height padding for bank conflicts.Eric Anholt2018-02-014-0/+63
* broadcom/vc5: Simplify separate stencil surface setup.Eric Anholt2018-02-013-99/+77
* broadcom/vc5: Rename the UIFCFG register in the UAPI.Eric Anholt2018-02-012-2/+2
* broadcom/vc5: Skip over missing color buffers for a couple of checks.Eric Anholt2018-02-012-0/+6
* broadcom/vc5: Add the missing PIPE_CAP_FENCE_SIGNAL.Eric Anholt2018-02-011-0/+1
* renderonly: fix dumb BO allocation for non 32bpp formatsLucas Stach2018-02-011-1/+2
* radeonsi: use ac_build_buffer_load_format for image buffer loadsMarek Olšák2018-02-011-4/+10
* ac: add glc parameter to ac_build_buffer_load_formatMarek Olšák2018-02-012-2/+2
* radeonsi: load the right number of components for VS inputs and TBOsMarek Olšák2018-02-012-5/+16
* radeonsi: remove unused si_shader_context membersMarek Olšák2018-02-012-11/+0
* r600/eg: make sure we allow vpm bit on other CF ops.Dave Airlie2018-02-011-0/+1
* gallium/st/clover: remove unused PIPE_SHADER_IR_LLVMTimothy Arceri2018-02-016-18/+5
* r600/sb: just add some missing debug bitsDave Airlie2018-02-011-0/+15
* r600: fix buffer resinfo opcode translation.Dave Airlie2018-02-012-2/+2
* svga: use opcode local var to simplify some codeBrian Paul2018-01-311-4/+2
* svga: s/unsigned/VGPU10_OPCODE_TYPE/Brian Paul2018-01-311-10/+11
* winsys/radeon: Compute is_displayable in surf_drm_to_winsysMichel Dänzer2018-01-311-0/+3
* virgl: also remove dimension on indirect.Dave Airlie2018-01-311-1/+0
* radeonsi: remove DBG_PRECOMPILEMarek Olšák2018-01-313-51/+0
* radeonsi: print shader-db stats for main parts, not final binariesMarek Olšák2018-01-313-13/+23
* radeonsi: move max_simd_waves computation into a separate functionMarek Olšák2018-01-312-12/+23
* nir: add lower_all_io_to_temps flagTimothy Arceri2018-01-312-0/+2
* radeonsi/nir: add input support for arrays that have not been copied to temps...Timothy Arceri2018-01-311-67/+79
* ac/radeonsi: add lookup_interp_param and load_sample_position to the abiTimothy Arceri2018-01-311-0/+2
* radeonsi/nir: add prim_mask to the abiTimothy Arceri2018-01-311-3/+4
* radeonsi/nir: adjust load_sample_position() to be shared between backendsTimothy Arceri2018-01-311-2/+3
* radeonsi/nir: add si_nir_lookup_interp_param() helperTimothy Arceri2018-01-312-0/+40
* radeonsi/nir: move the interpolation qualifier scanningTimothy Arceri2018-01-311-16/+36
* radeonsi/nir: add interpolate at intrinsics to scan_instruction()Timothy Arceri2018-01-311-0/+30
* radeonsi: fix fence_server_sync() holding up extra work v2Andres Rodriguez2018-01-302-25/+28
* radeonsi: implement semaphore_server_signal v2Andres Rodriguez2018-01-301-0/+37
* radeonsi: add support for importing PIPE_FD_TYPE_SYNCOBJ semaphoresAndres Rodriguez2018-01-301-6/+20
* winsys/amdgpu: add support for syncobj signaling v3Andres Rodriguez2018-01-303-1/+98
* u_threaded_context: add support for fence_server_signal v2Andres Rodriguez2018-01-302-0/+21
* gallium: add fence_server_signal() v2Andres Rodriguez2018-01-302-0/+37
* gallium: introduce PIPE_FD_TYPE_SYNCOBJAndres Rodriguez2018-01-301-0/+1
* gallium: introduce PIPE_CAP_FENCE_SIGNAL v2Andres Rodriguez2018-01-3018-1/+18
* gallium: add type parameter to create_fence_fdAndres Rodriguez2018-01-3011-15/+35
* r600/sb: insert the else clause when we might depart from a loopDave Airlie2018-01-311-0/+17
* svga: Check rasterization state object before checking poly_stipple_enableNeha Bhende2018-01-291-1/+1
* svga: Adjust alpha for S3TC_DXT1_EXT RGB formatsNeha Bhende2018-01-291-0/+4
* radeonsi/nir: add support vs double inputsTimothy Arceri2018-01-301-0/+5
* radeonsi: pass input_idx to declare_nir_input_vs()Timothy Arceri2018-01-301-2/+3
* radeonsi: add bitcast_inputs() helperTimothy Arceri2018-01-301-6/+15
* radeonsi/nir: fix num_inputs for doubles in vsTimothy Arceri2018-01-301-5/+8
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