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* ilo: add a new struct for context statesChia-I Wu2014-09-2020-654/+672
| | | | | | | | | | Move pipe states in ilo_context to the new ilo_state_vector. The motivation is that ilo_context consists of several loosely related things. When we need an ilo_context somewhere, we usually need only one or two of the things in it. This change makes ilo_state_vector one such thing. An immediate result is that we no longer need ilo_context in 3D pipelines, something we have planned for since early days.
* ilo: merge ilo_gpe.h to ilo_state*.hChia-I Wu2014-09-2013-544/+513
| | | | | Move the #define's and struct's to ilo_state.h. Move the inline functions and function declarations to ilo_state_gen.h.
* ilo: rename ilo_gpe_gen*.[ch]Chia-I Wu2014-09-205-9/+9
| | | | Rename them to ilo_state_gen*.[ch].
* ilo: make ilo_fence opaqueChia-I Wu2014-09-202-5/+7
| | | | It is manipulated only in ilo_screen.c.
* gallivm: add information about different sampler/view units if analyzing shaderRoland Scheidegger2014-09-202-0/+10
| | | | | | Useful to know in some cases. Reviewed-by: Jose Fonseca <[email protected]>
* st/dri: remove GALLIUM_MSAA and __GL_FSAA_MODE environment variablesMarek Olšák2014-09-191-35/+0
| | | | | | | | | | | | | | | | | | | | Some users don't understand that these variables can break OpenGL. The general is rule is that if an app supports MSAA, you mustn't use GALLIUM_MSAA. For example, if an app has an 8xMSAA FBO and GALLIUM_MSAA=4 is set, resolving the FBO to the back buffer will be rejected which will look like this on all gallium drivers: http://www.phoronix.com/scan.php?page=article&item=amd_radeonsi_msaa The environment variables also have no effect on modern apps like TF2, but there is still a performance hit due to wasted bandwidth and VRAM. In a nutshell, it does more harm than good. Cc: 10.2 10.3 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* vc4: Fix perspective interpolation.Eric Anholt2014-09-191-1/+1
| | | | Fixes the mesa reflect demo and 6 tests under interpolation/
* vc4: Use the same method as for FRAG_Z to handle fragcoord W.Eric Anholt2014-09-195-13/+15
| | | | I need to get the non-reciprocal version of W for interpolation, anyway.
* util: don't try to emit half-float intrinsics if avx isn't availableRoland Scheidegger2014-09-191-1/+1
| | | | | | | | | These instructions only have vex encodings, thus they can't be used without avx. (Technically, one can still use avx-128 if avx isn't available because the environment doesn't store the ymm registers, however I don't think llvm can.) Reviewed-by: Jose Fonseca <[email protected]>
* ilo: rename ILO_DEBUG=3dChia-I Wu2014-09-195-6/+6
| | | | | | It has been a bad name since we added the builder. Rename it to ILO_DEBUG=batch to match i965, and call ilo_builder_decode() from ilo_cp_submit_internal().
* ilo: rename ilo_cp_flush()Chia-I Wu2014-09-1911-52/+52
| | | | | | "Flush" is used for too many things already: pipe resource flush, pipe context flush, pipe transfer region flush, and hardware pipeline flush. Rename it to ilo_cp_submit(). As such, ILO_DEBUG=flush is renamed to ILO_DEBUG=submit.
* ilo: remove ilo_cp_empty()Chia-I Wu2014-09-193-22/+12
| | | | Call ilo_builder_batch_used() directly.
* ilo: simplify ilo_cp_set_owner()Chia-I Wu2014-09-195-129/+121
| | | | | | The simplification allows us to get rid of ilo_cp_set_ring() and ilo_cp_implicit_flush(). The 3D query code is refactored for the simplification.
* vc4: Add support for stencil operations.Eric Anholt2014-09-188-2/+118
| | | | | | | While depth test state is passed through the fragment shader as sideband, data, the stencil test state has to be set by the fragment shader itself. Many tests are still failing, but this gets most of hiz/ passing.
* vc4: Actually implement VC4_DEBUG=cl.Eric Anholt2014-09-184-0/+141
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* draw: (trivial) remove duplicated linesRoland Scheidegger2014-09-181-12/+0
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* vc4: Allow copy propagation of uniforms.Eric Anholt2014-09-171-1/+15
| | | | | Fixes 12 piglit tests (and 8 more crash -> fail) from reducing register pressure.
* vc4: Make sure thread end doesn't have a uniform read.Eric Anholt2014-09-171-0/+8
| | | | Prevents regression when I start doing copy propagation on uniforms.
* vc4: Allow dead code elimination of instructions that read uniforms.Eric Anholt2014-09-171-2/+1
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* vc4: Add support for reordering the uniform stream after optimization.Eric Anholt2014-09-174-0/+87
| | | | | | This allows for introducing dead code eliminating of uniforms, copy propagation of uniforms, and instruction rescheduling between instructions that both read uniforms.
* vc4: Initialize the various qreg arrays when allocating them.Eric Anholt2014-09-171-0/+4
| | | | | | | This is particularly important for outputs, where we try to MOV the whole vec4 to the VPM, even if only 1-3 components had been set up. It might also be important for temporaries, if the shader reads components before writing them.
* vc4: Fix stray disable of the CSE pass.Eric Anholt2014-09-171-1/+0
| | | | Somehow I slipped this in with the original commit of CSE.
* gallivm,tgsi: fix idiv by zero crashrconde2014-09-172-7/+25
| | | | | | | | While the result of signed integer division by zero is undefined by glsl (and doesn't exist with d3d10), we must not crash, so need to make sure we don't get sigfpe much like udiv already does. Unlike udiv where we return 0xffffffff (as required by d3d10) there is no requirement right now to return anything specific so we use zero.
* gallivm: add texture target information for sample opcodes to tgsi infoRoland Scheidegger2014-09-171-14/+43
| | | | | | | | | | | | | | sample opcodes don't have valid texture target information (and I don't think this should be changed), however it would be nice if we had that information ready elsewhere, so stuff that information into the tgsi info when analyzing a shader. v2: Ilja Mirkin spotted some bugs wrt not handling msaa resources. So add them and while there also add them to the tex opcode analysis this was cloned from as well (plus get rid of some bug not detecting indirect textures there in some cases too). Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Define PIPE_FORMAT_xyzw8888_{SNORM, SRGB} aliasesRichard Sandiford2014-09-171-0/+24
| | | | | | | | | ...i.e. formats in which the first listed component is in the least significant byte of the integer. The corresponding UNORM aliases already exist. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: Add PIPE_FORMAT_x8B8G8R8_SNORM formatsRichard Sandiford2014-09-172-0/+6
| | | | | | | | | | | This means that each RnGnBnxn format has a reversed counterpart, which is necessary for handling big-endian mesa<->gallium mappings. The associated UNORM and SRGB formats already exist. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: Define PIPE_FORMAT_{LA, AL, RG, GR}nn aliasesRichard Sandiford2014-09-171-0/+32
| | | | | | | | | | ...i.e. formats in which the first listed component is in the least significant half of the integer. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: Add PIPE_FORMAT_AnLn and PIPE_FORMAT_GnRn formatsRichard Sandiford2014-09-172-0/+19
| | | | | | | | | | | | ...i.e. formats in which the alpha or green channel is first in memory. This means that each LnAn and RnGn format has a reversed counterpart, which is necessary for handling big-endian mesa<->gallium mappings. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* util: move shared rgtc code to util (v2)Dave Airlie2014-09-172-118/+46
| | | | | | | | | | | This was being shared using a ../../ get out of gallium into mesa, and I swore when I did it I'd fix things when we got a util dir, we did, so I have. v2: move RGTC_DEBUG define Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* vc4: Claim ARB_fbo.Eric Anholt2014-09-161-1/+3
| | | | | | | | This gets a ton of piglit working that crashes in waffle context management stuff otherwise. Actually supporting mismatched FB sizes is at best going to require some more load/store generals for color buffers, but if I can't manage to do that I'll want to just have state_tracker reject those FBOs as unsupported, rather than deny GL 2.1.
* vc4: Fix memory leaks in register allocation.Eric Anholt2014-09-161-0/+3
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* vc4: Move register allocation to a separate file.Eric Anholt2014-09-164-100/+165
| | | | | I'm going to be rewriting it all, and having it mixed up with the QIR-to-QPU opcode translation was messy.
* vc4: Add support for computed depth writes.Eric Anholt2014-09-163-2/+26
| | | | Fixes piglit glsl-1.10-fragdepth and early-z.
* vc4: Restructure depth input/output in fragment shaders.Eric Anholt2014-09-164-12/+17
| | | | | | The goal here is to have an argument for the depth write opcode so that I can do computed depth. In the process, this makes the calculations that will be emitted more obvious in the QIR.
* freedreno: add a standalone ir3_compiler binary for building TGSIIlia Mirkin2014-09-162-0/+191
| | | | | | Compiler taken from the combo old/new compiler comparer + simulator. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno: add default .dir-locals.el for emacs settingsIlia Mirkin2014-09-161-0/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* llvmpipe: fix rast debugging outputDave Airlie2014-09-161-0/+11
| | | | | | | | The triangle_32_ rast functions never made it into the debug output, confused me for a few seconds. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* util: Add big-endian layout for a number of formats.Richard Sandiford2014-09-162-35/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch builds on 6c8f547f66e68b495c708f8ffcb67370caa5ffe8 and previous patches by allowing u_format.csv to specify separate big-endian and little-endian layouts. It then uses this to specify the correct layouts for various depth/stencil formats. Later patches handle other formats. To recap, the idea is that u_format.csv lists the channels for an N-byte value as though it were an N-byte integer. For little-endian targets the channels are listed starting at the least-significant bit of the integer while for big-endian targets the channels are listed starting at the most-significant bit. This means that for something like PIPE_FORMAT_B8G8R8A8_UNORM (blue in first byte of memory, alpha in last byte of memory) the orders are the same for both endiannesses. But for something like PIPE_FORMAT_S8_UINT_Z24_UNORM, where the stencil is in the least significant byte of a 32-bit integer, there need to be separate channel definitions for each endianness. The effect of this patch is to make the affected PIPE_FORMAT_*s have the same layout as the associated MESA_FORMAT_*s for big-endian. The MESA_FORMAT_*s are already handled correctly. Fixes various piglit tests on z. No regressions on x86_64. [airlied: squash subsequent patches] util: Add big-endian layout for 5551 and 565 formats util: Add big-endian layout for 10/10/10/2 formats util: Add big-endian layout for 4444 formats util: Add big-endian layout for 233 format util: Add big-endian layout for 44 formats Signed-off-by: Dave Airlie <[email protected]>
* llvmpipe: Fix PIPE_FORMAT_Z32_FLOAT_S8X24_UINT handling for big-endian.Richard Sandiford2014-09-161-1/+2
| | | | | | | | | | | | | | | | | llvmpipe treats PIPE_FORMAT_Z32_FLOAT_S8X24_UINT as a bit of a special case, handling it as two 32-bit pieces rather than a single 64-bit block: /* 64bit d/s format is special already extracted 32 bits */ total_bits = format_desc->block.bits > 32 ? 32 : format_desc->block.bits; The format_desc describes the whole 64-bit block, so the z shift will be 32 for big-endian. But since we're accessing the z channel as a 32-bit value rather than a 64-bit value, we need to mask the shift with 31. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallivm: Fix uses of 2^24Richard Sandiford2014-09-161-4/+4
| | | | | | | | | | Fallback cases in lp_bld_arit.c used 2^24 to mean "2 to the power 24", but in C it's "2 xor 24", i.e. 26. Fixed by using 1<< instead. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Cc: "10.2 10.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallivm: Add SNORM clamping to lp_build_{add, sub}Richard Sandiford2014-09-161-6/+28
| | | | | | | ...fixing the associated TODO. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Richard Sandiford <[email protected]>
* gallivm: attach DataLayout to module too, not just pass manager.Rafael Ávila de Espíndola2014-09-161-0/+7
| | | | | | | | | It looks like it was possible to attach it to both for a long time, however since llvm r217548 attaching it to just the pass manager is no longer sufficient and causes bugs (see http://llvm.org/bugs/show_bug.cgi?id=20903). Tested-by: Vinson Lee <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: handle SAMPLE opcode in aos samplingRoland Scheidegger2014-09-162-13/+50
| | | | | | | | | | | This is just a very limited version, in particular sampler and sampler view index must be the same. It cannot handle any modifiers neither. Works much the same as soa version otherwise, to figure out the target we need to store the sampler view dcls. While here, also handle (no-op) RET and get rid of a couple bogus deprecated comments. Reviewed-by: Jose Fonseca <[email protected]>
* tgsi: accept offsets for sample opcodes too in the text parserRoland Scheidegger2014-09-161-3/+2
| | | | | | | | | | sample opcodes are a little oddly represented in the opcode_info, since they don't count as texture instructions - they don't have valid target information, but they may have offsets (unlike "ordinary" texture instructions, the texture token may be optional for them). So just make sure with these opcodes the optional offsets are accepted. Reviewed-by: Jose Fonseca <[email protected]>
* tgsi: don't print texture target for sample opcodesRoland Scheidegger2014-09-161-2/+5
| | | | | | | | sample opcodes don't encode a texture target, it would thus always print UNKNOWN, which is not helpful (and wouldn't parse when giving back the shader text to tgsi). Reviewed-by: Jose Fonseca <[email protected]>
* vc4: Bump maximum ARB program temporaries to match Intel/AMD.Eric Anholt2014-09-151-1/+1
| | | | | This query has always been useless, but we could potentially reject well-formed, runnable programs if we expose a value that's too low.
* vc4: Bump maximum uniforms count to match other drivers.Eric Anholt2014-09-151-1/+1
| | | | | | We don't have any specific limits in the hardware, just like the other GPUs, so match their behavior. Fixes minmax_gles2 and several other piglit tests relying on the specced uniform minmax values.
* vc4: Dynamically allocate the TGSI-to-qreg arrays.Eric Anholt2014-09-152-12/+44
| | | | | Fixes buffer overflows in some piglit tests (which are still failing to register allocate anyway).
* vc4: Fix memory leaks of struct qinst.Eric Anholt2014-09-154-3/+17
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* vc4: Fix memory leaks of some vc4_compile contents.Eric Anholt2014-09-152-10/+11
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