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* r600g: set DISABLE in CB_COLOR_CONTROL if colormask is 0Marek Olšák2012-07-124-3/+17
| | | | | | this will be useful for in-place DB decompression, otherwise should be harmless Reviewed-by: Alex Deucher <[email protected]>
* r600g: move CB_SHADER_MASK setup into cb_misc_stateMarek Olšák2012-07-126-28/+32
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: move MULTIWRITE setup into cb_misc_state for r6xx-r7xxMarek Olšák2012-07-124-21/+20
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: move CB_TARGET_MASK setup into new cb_misc_stateMarek Olšák2012-07-128-13/+51
| | | | | | | | | | to remove some overhead from draw_vbo. This is a derived state. BTW, I've got no idea how compute interacts with 3D here, but it should use cb_misc_state, so that 3D and compute don't conflict. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* st/mesa: implement accelerated stencil blitting using shader stencil exportMarek Olšák2012-07-124-38/+176
| | | | Reviewed-by: Alex Deucher <[email protected]>
* st/mesa: set colormask to zero when blitting depthMarek Olšák2012-07-121-4/+8
| | | | Reviewed-by: Alex Deucher <[email protected]>
* gallium/u_blit: remove useless memset callsMarek Olšák2012-07-121-6/+0
| | | | | | the structure is calloc'd. Reviewed-by: Alex Deucher <[email protected]>
* gallium/u_blit: drop not-very-useful wrapper around util_blit_pixels_writemaskMarek Olšák2012-07-124-52/+19
| | | | | | just rename it to util_blit_pixels Reviewed-by: Alex Deucher <[email protected]>
* gallium/u_blit: don't do two copies for non-2D texturesMarek Olšák2012-07-121-33/+39
| | | | | | | | | Because u_blit couldn't sample a 1D, 3D, CUBE and ARRAY texture, we created a 2D texture holding a copy of one slice of the source texture (even for 1D). Let's just do it right. Reviewed-by: Alex Deucher <[email protected]>
* gallium/util: move pipe_tex_to_tgsi_tex helper function into u_inlinesMarek Olšák2012-07-122-30/+30
| | | | Reviewed-by: Alex Deucher <[email protected]>
* gallium/u_blitter: accelerate stencil-only copyingMarek Olšák2012-07-123-1/+79
| | | | | | This doesn't seem to be used by anything yet, but better safe than sorry. Reviewed-by: Alex Deucher <[email protected]>
* gallium/u_blitter: accelerate depth-stencil copying using shader stencil exportMarek Olšák2012-07-124-12/+147
| | | | | | This fixes stencil buffer write transfers on r600g. Reviewed-by: Alex Deucher <[email protected]>
* gallium: add util_format_stencil_only helper functionMarek Olšák2012-07-121-0/+29
| | | | | | used for stencil sampler views. Reviewed-by: Alex Deucher <[email protected]>
* gallium/u_blitter: minify depth0 when initializing last_layerMarek Olšák2012-07-121-1/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* gallium/u_gen_mipmap: accelerate depth texture mipmap generationMarek Olšák2012-07-121-26/+58
| | | | Reviewed-by: Alex Deucher <[email protected]>
* wayland-drm: Add protocol to create planar buffersKristian Høgsberg2012-07-111-1/+1
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* wayland-drm: Pass struct wl_drm_buffer to the driverKristian Høgsberg2012-07-112-15/+16
| | | | | We're going to extend this to support multi-plane buffers, so pass this to the driver so it can access the details.
* r600g/compute: Disable growing the memory poolTom Stellard2012-07-114-23/+38
| | | | | | | | | | | | | | | | | | | | | | | The code for growing the memory pool (which is used for storing all of the global buffers) wasn't working. There seem to be two separate issues with the memory pool code. The first was the way it was growing the pool. When the memory pool needed more space, it would: 1. Copy the data from the memory pool's backing texture to system memory. 2. Delete the memory pool's texture 3. Create a bigger backing texture for the memory pool. 4. Copy the data from system memory into the bigger texture. The copy operations didn't seem to be working, and I suspect that since they were using fragment shaders to do the copy, that there might have been a problem with the mixing of compute and 3D state. The other issue is that the size of 1D textures is limited, and I was having trouble getting 2D textures to work. I think these problems will be easier to solve once more code is shared between 3D and compute, which is why I decided to disable it for now rather than continue searching for a fix.
* radeon/llvm: Use multiclasses for floating point loadsTom Stellard2012-07-117-50/+46
| | | | | | | The original strategy for handling floating point loads, which was to lower (f32 load) to (f32 bitcast (i32 load)) wasn't really working. The main problem was that the DAG legalizer couldn't handle replacing a node with two results (load) with a node with only one result (bitcast).
* radeon/llvm: Don't set the IMM bit in SMRD instruction definitions.Tom Stellard2012-07-111-7/+2
| | | | The IMM bit is already being set in SICodeEmitter.
* r600g/compute: Add more debugging outputTom Stellard2012-07-112-1/+42
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* r600g: improve flushed depth texture handling v2Vadim Girlin2012-07-116-61/+83
| | | | | | | | | | | Use r600_resource_texture::flished_depth_texture for GPU access, and allocate it in the VRAM. For transfers we'll allocate texture in the GTT and store it in the r600_transfer::staging. Improves performance when flushed depth texture is frequently used by the GPU, e.g. in Lightsmark (~30%) Signed-off-by: Vadim Girlin <[email protected]>
* gallium/docs: document interface changes for timestamp queryMarek Olšák2012-07-101-0/+10
| | | | the query type is already documented
* identity: implement get_timestampMarek Olšák2012-07-101-0/+10
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* noop: implement get_timestampMarek Olšák2012-07-101-0/+6
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* trace: implement get_timestampMarek Olšák2012-07-101-0/+19
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* galahad: implement get_timestampMarek Olšák2012-07-101-0/+10
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* softpipe: implement get_timestamp and expose ARB_timer_queryMarek Olšák2012-07-101-1/+10
| | | | PIPE_QUERY_TIMESTAMP is already implemented and working.
* gallium: add QUERY_TIMESTAMP cap and get_timestamp screen functionMarek Olšák2012-07-1011-1/+18
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* r600g: Don't create a texture for the memory_pool during screen initTom Stellard2012-07-092-8/+24
| | | | | | | This fixes a segfault in r600_screen_create() introduced by eb065f5d9d1159af3a88a64a7606c9b6d67dc3 Reported by tilman on irc.
* radeon/llvm: Rename namespace from AMDIL to AMDGPUTom Stellard2012-07-0925-360/+361
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* r600g: Update number of gprs when adding a vertex instructionTom Stellard2012-07-091-0/+4
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* r600g/compute: Use evergreen_cb() for binding RATsTom Stellard2012-07-095-70/+48
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* r600g: Add support for RATs in evergreen_cb()Tom Stellard2012-07-091-3/+11
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* r600g: Use a texture as the underlying resource for compute_memory_poolTom Stellard2012-07-092-18/+37
| | | | This the first step towards being able to use evergreen_cb to bind RATs.
* r600g: Add is_rat flag to r600_resource_textureTom Stellard2012-07-091-0/+1
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* r600g: Add r600_context_pipe_state_emit()Tom Stellard2012-07-092-6/+71
| | | | | | | | This function is used when dispatching compute shader in order to avoid mixing compute and 3D registers in the context's dirty list. This allows the compute code to resuse 3D functions like evergreen_cb, which return a struct r600_pipe_state and still have control over when and how the register writes are emitted.
* r600g: Add pkt_flag parameter to r600_context_block_emit_dirty()Tom Stellard2012-07-093-3/+15
| | | | | | | This allows the shader type bit to be set in the pm4 header when emitting registers for compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* r600g/compute: Move LOOP_CONST initialization to start_compute_cs atomTom Stellard2012-07-091-14/+16
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* r600g: Add start_compute_cs atom to struct r600_contextTom Stellard2012-07-094-94/+96
| | | | | | | | | The start_compute_cs atom initializes some config and context registers to the values needed for running compute shaders. When a compute shader is dispatched, this atom is emitted after the start_cs_cmd atom, which initializes registers that are common to both 3D and compute. Reviewed-by: Marek Olšák <[email protected]>
* r600g: Add pkt_flag member to struct r600_command_bufferTom Stellard2012-07-091-3/+16
| | | | | | | | | | Some packets require the shader type bit (bit 1) to be set when used for compute shaders. The pkt_flag will be initialized to RADEON_CP_PACKET3_COMPUTE_MODE for any struct r600_command_buffer used for dispatching compute shaders and it will be or'd against the result of the PKT3 macro when adding a new packet to a struct r600_command buffer. Reviewed-by: Marek Olšák <[email protected]>
* r600g: Only emit start_cs_cmd atom once for compute command streamsTom Stellard2012-07-091-2/+0
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* r600g: fix stencil texturing with Z32_FLOAT_S8X24_UINTMarek Olšák2012-07-091-0/+2
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* r600g: add assertions after translate_colorswap/colorformat/dbformat/texformatMarek Olšák2012-07-092-3/+17
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* r600g: inline r600_hw_copy_regionMarek Olšák2012-07-091-21/+5
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* r600g: enable dual src blending on r7xxMarek Olšák2012-07-091-1/+1
| | | | No lockups here.
* r600g: use depth format from pipe_surface, not pipe_resourceMarek Olšák2012-07-092-4/+4
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* r600g: use u_box_origin_2d helper functionMarek Olšák2012-07-091-10/+3
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* gallium/u_blitter: consolidate some state changesMarek Olšák2012-07-091-32/+17
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* r600g: remove stray semicolonMarek Olšák2012-07-071-1/+1
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