| Commit message (Expand) | Author | Age | Files | Lines |
* | radeonsi: VS as ES/LS are not yet supported with R600_DEBUG=nir | Nicolai Hähnle | 2017-07-31 | 1 | -0/+2 |
* | radeonsi/nir: lower uniforms to UBO loads | Nicolai Hähnle | 2017-07-31 | 1 | -0/+10 |
* | radeonsi/nir: lower txp instructions | Nicolai Hähnle | 2017-07-31 | 1 | -0/+5 |
* | ac/nir,radeonsi: add and use ac_shader_abi::frag_pos | Nicolai Hähnle | 2017-07-31 | 1 | -4/+8 |
* | ac/nir,radeonsi: add and use ac_shader_abi::{ancillary,sample_coverage} | Nicolai Hähnle | 2017-07-31 | 1 | -2/+4 |
* | radeonsi: tweak next-shader assumptions when streamout is used | Nicolai Hähnle | 2017-07-31 | 1 | -5/+11 |
* | radeonsi: use new function ac_build_umin for edgeflag clamping | Nicolai Hähnle | 2017-07-31 | 1 | -1/+1 |
* | ac/nir,radeonsi: add ac_shader_abi::front_face | Nicolai Hähnle | 2017-07-31 | 1 | -4/+12 |
* | radeonsi: implement and use ac_shader_abi::load_ssbo | Nicolai Hähnle | 2017-07-31 | 2 | -11/+20 |
* | radeonsi: make get_indirect_index globally visible | Nicolai Hähnle | 2017-07-31 | 2 | -10/+13 |
* | radeonsi/nir: perform radeonsi-specific lowering and optimization passes | Nicolai Hähnle | 2017-07-31 | 1 | -0/+41 |
* | radeonsi/nir: perform lowering of input/output driver locations | Nicolai Hähnle | 2017-07-31 | 3 | -0/+29 |
* | radeonsi/nir: add image descriptor loading | Nicolai Hähnle | 2017-07-31 | 3 | -8/+32 |
* | ac/nir: add image and write parameter to ac_shader_abi::load_sampler_desc | Nicolai Hähnle | 2017-07-31 | 1 | -1/+2 |
* | radeonsi/nir: set si_shader_context::num_{sampler,images} | Nicolai Hähnle | 2017-07-31 | 1 | -0/+5 |
* | radeonsi/nir: implement ac_shader_abi::load_sampler_desc | Nicolai Hähnle | 2017-07-31 | 3 | -20/+49 |
* | ac/nir,radeonsi: add ac_shader_abi::chip_class | Nicolai Hähnle | 2017-07-31 | 1 | -0/+2 |
* | radeonsi/nir: emit FS outputs | Nicolai Hähnle | 2017-07-31 | 1 | -10/+14 |
* | radeonsi/nir: load FS inputs | Nicolai Hähnle | 2017-07-31 | 3 | -11/+52 |
* | radeonsi/nir: load VS inputs | Nicolai Hähnle | 2017-07-31 | 3 | -2/+40 |
* | ac/nir,radeonsi: add ac_shader_abi::load_ubo | Nicolai Hähnle | 2017-07-31 | 1 | -0/+14 |
* | ac,radeonsi: add ac_shader_abi::emit_outputs for hardware VS shaders | Nicolai Hähnle | 2017-07-31 | 2 | -11/+33 |
* | radeonsi: pass si_shader_context to get_primitive_id | Nicolai Hähnle | 2017-07-31 | 1 | -6/+5 |
* | radeonsi: translate NIR to LLVM | Nicolai Hähnle | 2017-07-31 | 3 | -3/+21 |
* | radeonsi: dump NIR instead of TGSI when appropriate | Nicolai Hähnle | 2017-07-31 | 1 | -1/+5 |
* | radeonsi: bypass the shader cache for NIR shaders | Nicolai Hähnle | 2017-07-31 | 1 | -2/+3 |
* | radeonsi: scan NIR shaders to obtain required info | Nicolai Hähnle | 2017-07-31 | 5 | -6/+335 |
* | radeonsi: add si_shader_selector::nir | Nicolai Hähnle | 2017-07-31 | 1 | -0/+3 |
* | radeonsi: implement pipe_screen::get_compiler_options for NIR | Nicolai Hähnle | 2017-07-31 | 1 | -0/+33 |
* | radeonsi: add nir include paths | Nicolai Hähnle | 2017-07-31 | 1 | -0/+1 |
* | ac,radeonsi: move some VS input descriptions to ac_shader_abi | Nicolai Hähnle | 2017-07-31 | 2 | -31/+37 |
* | radeonsi: store shader function arguments in a structure | Nicolai Hähnle | 2017-07-31 | 1 | -300/+322 |
* | gallium/targets: link against NIR when building radeonsi | Nicolai Hähnle | 2017-07-31 | 6 | -0/+8 |
* | st/glsl_to_nir: move nir_lower_io to drivers | Nicolai Hähnle | 2017-07-31 | 2 | -0/+9 |
* | st/mesa: get rid of st_glsl_types | Nicolai Hähnle | 2017-07-31 | 4 | -10/+26 |
* | gallium: add PIPE_CAP_NIR_SAMPLERS_AS_DEREF | Nicolai Hähnle | 2017-07-31 | 17 | -0/+18 |
* | dri_interface,egl,gallium: only expose RGBA visuals on Android | Marek Olšák | 2017-07-31 | 1 | -1/+23 |
* | radeonsi: expose MRT-draw-calls to HUD | Marek Olšák | 2017-07-31 | 4 | -0/+11 |
* | gallium: Fix Thomas's email address | Kenneth Graunke | 2017-07-28 | 3 | -3/+3 |
* | radeonsi: update dirty_level_mask only when flushing or unbinding framebuffer | Marek Olšák | 2017-07-28 | 5 | -43/+59 |
* | radeonsi: rely on CLEAR_STATE for clearing UCP and blend color registers | Marek Olšák | 2017-07-28 | 3 | -2/+12 |
* | radeonsi: rely on CLEAR_STATE for resetting the framebuffer and sample mask | Marek Olšák | 2017-07-28 | 1 | -3/+10 |
* | radeonsi: use CLEAR_STATE to initialize some registers | Marek Olšák | 2017-07-28 | 1 | -54/+4 |
* | virgl: drop precise modifier. | Dave Airlie | 2017-07-28 | 1 | -0/+10 |
* | radeonsi: bail out instead of crashing if the main shader part failed to compile | Nicolai Hähnle | 2017-07-27 | 1 | -0/+3 |
* | radeonsi: update a comment for merged shaders | Nicolai Hähnle | 2017-07-27 | 1 | -1/+5 |
* | radeonsi/gfx9: dump previous stage LLVM IR for merged shaders | Nicolai Hähnle | 2017-07-27 | 1 | -0/+7 |
* | radeonsi: make sure TCS main output VGPRs don't alias inputs | Nicolai Hähnle | 2017-07-27 | 1 | -5/+13 |
* | radeonsi/gfx9: always wrap GS and TCS in an if-block (v2) | Nicolai Hähnle | 2017-07-27 | 2 | -33/+79 |
* | radeonsi/gfx9: fix vertex idx in ES with multiple waves per threadgroup | Nicolai Hähnle | 2017-07-27 | 1 | -1/+6 |