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* gallium/radeon: fold r600_setup_surface into r600_init_surfaceMarek Olšák2016-10-261-38/+24
* winsys/amdgpu: remove unused definitionsMarek Olšák2016-10-261-8/+0
* gallium/radeon: fold radeon_winsys::surface_best into radeon/winsysMarek Olšák2016-10-264-38/+9
* gallium/radeon: use r600_gfx_write_event_eop everywhereMarek Olšák2016-10-263-23/+10
* gallium/radeon: make r600_gfx_write_fence more genericMarek Olšák2016-10-264-14/+34
* gallium/radeon: fix a ZPASS comment, EVENT_WRITE_EOP fixupsMarek Olšák2016-10-262-4/+4
* radeonsi: enable SDMA on Carrizo and all CIK chips againMarek Olšák2016-10-261-10/+0
* winsys/amdgpu: fix radeon_surf::macro_tile_index for imported texturesMarek Olšák2016-10-261-0/+17
* gallium/radeon: make sure the address of separate CMASK is aligned properlyMarek Olšák2016-10-261-2/+3
* gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_modeMarek Olšák2016-10-261-7/+7
* nir/i965/anv/radv/gallium: make shader info a pointerTimothy Arceri2016-10-264-10/+10
* nv50/ir: start LocalCSE with getFirst to merge PHI instructionsKarol Herbst2016-10-251-1/+1
* nvc0: use correct bufctx when invalidating CP texturesSamuel Pitoiset2016-10-251-1/+1
* gallium/stapi: fix comment for st_visual::buffer_maskBrian Paul2016-10-241-1/+1
* tgsi: trivial build fix for MSVCBrian Paul2016-10-241-1/+1
* nv50/ir: do not perform global membar for shared memorySamuel Pitoiset2016-10-241-1/+4
* st/nine: Fix locking CubeTexture surfaces.Axel Davy2016-10-241-0/+1
* st/nine: Fix mistake in Volume9 UnlockBoxAxel Davy2016-10-241-1/+1
* st/nine: Use align_calloc instead of align_mallocAxel Davy2016-10-245-7/+7
* gallium/util: Add align_callocAxel Davy2016-10-241-0/+8
* st/nine: Fix leak with integer and boolean constantsAxel Davy2016-10-241-21/+18
* tgsi/scan: scan texture offset operandsMarek Olšák2016-10-241-0/+16
* tgsi/scan: move src operand processing into a separate functionMarek Olšák2016-10-241-171/+183
* tgsi/scan: get information about shader buffer usageMarek Olšák2016-10-242-0/+23
* tgsi/scan: handle indirect image indexing correctlyMarek Olšák2016-10-242-8/+17
* tgsi/scan: don't treat RESQ etc. as memory instructionsMarek Olšák2016-10-241-5/+13
* tgsi/scan: get information about indirect 2D file accessMarek Olšák2016-10-242-0/+7
* tgsi/scan: get information about indirect CONST accessMarek Olšák2016-10-242-0/+15
* nv50/ir: display OP_BAR subops in debug modeSamuel Pitoiset2016-10-241-0/+9
* nv50/ir: it appears that OP_DISCARD can't take a join modifierIlia Mirkin2016-10-221-0/+1
* nv50/ir: use levelZero for non-frag tex/txp opsIlia Mirkin2016-10-221-0/+5
* gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERSIlia Mirkin2016-10-2217-0/+19
* nvc0/ir: remove outdated comment about SHLADDSamuel Pitoiset2016-10-222-2/+0
* vc4: Avoid making temporaries for assignments to NIR registers.Eric Anholt2016-10-211-35/+79
* vc4: Add a comment with discussion of how simulation works.Eric Anholt2016-10-211-0/+25
* vc4: Move simulator winsys mapping and tracking to the simulator.Eric Anholt2016-10-213-20/+56
* vc4: Move simulator memory management to a u_mm.h heap.Eric Anholt2016-10-215-41/+208
* vc4: Move simulator globals into a struct.Eric Anholt2016-10-212-34/+29
* vc4: Restructure the simulator mode.Eric Anholt2016-10-215-84/+182
* vc4: Fix termination of the initial scan for branch targets.Eric Anholt2016-10-211-11/+8
* radeonsi: fix a regression in si_eliminate_const_outputNicolai Hähnle2016-10-211-4/+3
* nv50,nvc0: don't keep track of whether fb rt0 is integer-onlyIlia Mirkin2016-10-216-44/+22
* nvc0: do not break 3D state by pushing MS coordinates on FermiSamuel Pitoiset2016-10-201-43/+44
* nvc0: translate compute shaders at program creationSamuel Pitoiset2016-10-201-0/+4
* gallivm: try to fix build with LLVM <= 3.4 due to missing CallSite.hMarek Olšák2016-10-201-1/+5
* radeonsi: fix build of si_eliminate_const_vs_outputs on LLVM <= 3.8Marek Olšák2016-10-201-3/+2
* gallivm: add wrappers for missing functions in LLVM <= 3.8Marek Olšák2016-10-202-0/+27
* radeonsi: fix 64-bit loads from LDSNicolai Hähnle2016-10-201-1/+1
* nv50/ir: process texture offset sources as regular sourcesIlia Mirkin2016-10-191-53/+94
* nv50,nvc0: avoid reading out of bounds when getting bogus so infoIlia Mirkin2016-10-192-2/+8
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