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* intel/nir: Stop returning the shader from helpersJason Ekstrand2019-06-051-1/+1
* iris: Only recompile CS when neededCaio Marcelo de Oliveira Filho2019-06-051-1/+1
* freedreno/a6xx: Use VALIDREG in next_regid() helperKristian H. Kristensen2019-06-051-6/+6
* freedreno/a6xx: Remove dead code from a5xxKristian H. Kristensen2019-06-051-10/+0
* panfrost/midgard: Always break up fragment writeoutAlyssa Rosenzweig2019-06-051-68/+21
* panfrost/midgard: Fix cubemap regressionAlyssa Rosenzweig2019-06-051-2/+9
* winsys/drm: Fix out of scope variable usageDeepak Rawat2019-06-021-12/+13
* panfrost/midgard: Lower integer divisionAlyssa Rosenzweig2019-06-052-144/+1
* panfrost/midgard: Fix 1-arg ALU memory corruptionAlyssa Rosenzweig2019-06-051-1/+2
* panfrost/midgard: Add a bunch of new ALU opsAlyssa Rosenzweig2019-06-053-4/+32
* swr: fix support for GL_ARB_copy_image extensionKrzysztof Raszkowski2019-06-051-1/+16
* build: Build etnaviv drmGuido Günther2019-06-052-7/+14
* etnaviv: gallium: Use internal etnaviv_drmif.hGuido Günther2019-06-054-4/+4
* etnaviv: untabifyGuido Günther2019-06-052-4/+4
* panfrost: bifrost: Fix format string in disassemblerTomeu Vizoso2019-06-051-1/+1
* iris: Free the buffer when reading from the disk cache.Kenneth Graunke2019-06-041-3/+8
* panfrost/midgard: Don't promote non-SSA to pipeline registersAlyssa Rosenzweig2019-06-051-1/+3
* freedreno: Drop invalid scissor optimization.Eric Anholt2019-06-041-7/+0
* virgl: resolve to correct level during texture readChia-I Wu2019-06-041-2/+2
* virgl: fix texture resolving with compressed formatsChia-I Wu2019-06-041-12/+17
* freedreno: Add printf pattern string.Bas Nieuwenhuizen2019-06-041-1/+1
* Revert "vl: Enable DRM by default."Bas Nieuwenhuizen2019-06-042-2/+2
* panfrost/midgard: .pos propagationAlyssa Rosenzweig2019-06-041-8/+72
* panfrost/midgard: Cleanup copy propagationAlyssa Rosenzweig2019-06-041-11/+4
* panfrost/midgard: Implement "pipeline register" prepassAlyssa Rosenzweig2019-06-044-2/+96
* panfrost/midgard: Helpers for pipelineAlyssa Rosenzweig2019-06-045-9/+79
* panfrost/midgard: Refactor schedule/emit pipelineAlyssa Rosenzweig2019-06-046-707/+744
* panfrost/midgard: Cleanup RA (stylistic changes)Alyssa Rosenzweig2019-06-041-16/+30
* panfrost/midgard: Share MIR utilitiesAlyssa Rosenzweig2019-06-042-40/+46
* panfrost/midgard: Misc. cleanup for readibilityAlyssa Rosenzweig2019-06-042-15/+35
* panfrost/midgard: Extend RA to non-vec4 sourcesAlyssa Rosenzweig2019-06-041-77/+278
* panfrost/midgard: Set masks on ld_varyAlyssa Rosenzweig2019-06-041-1/+3
* panfrost/midgard: Fix liveness analysis bugsAlyssa Rosenzweig2019-06-041-2/+8
* panfrost/midgard: Set int outmod for "pasted" codeAlyssa Rosenzweig2019-06-041-0/+4
* panfrost/midgard: Hoist some utility functionsAlyssa Rosenzweig2019-06-043-64/+71
* panfrost/midgard: Remove pinningAlyssa Rosenzweig2019-06-042-27/+2
* vl: Enable DRM by default.Bas Nieuwenhuizen2019-06-042-2/+2
* radeonsi/nir: Fix type in bindless address computationConnor Abbott2019-06-041-2/+2
* etnaviv: implement set_active_query_state(..) for hw queriesChristian Gmeiner2019-06-041-1/+10
* iris: Fix SO stride units for DrawTransformFeedbackKenneth Graunke2019-06-032-2/+2
* amd/common: use generated register headerNicolai Hähnle2019-06-0310-11/+7
* amd/common: use SH{0,1}_CU_EN definitions only of COMPUTE_STATIC_THREAD_MGMT_SE0Nicolai Hähnle2019-06-031-5/+5
* amd/common: unify PITCH_GFX6 and PITCH_GFX9Nicolai Hähnle2019-06-032-7/+7
* amd/common: cleanup DATA_FORMAT/NUM_FORMAT field namesNicolai Hähnle2019-06-032-8/+8
* iris: Always reserve binding table space for NIR constantsCaio Marcelo de Oliveira Filho2019-06-032-9/+14
* iris: Print binding tables when INTEL_DEBUG=btCaio Marcelo de Oliveira Filho2019-06-031-0/+53
* iris: Compact binding tablesCaio Marcelo de Oliveira Filho2019-06-033-76/+234
* iris: Create an enum for the surface groupsCaio Marcelo de Oliveira Filho2019-06-033-35/+45
* iris: Handle binding table in the driverCaio Marcelo de Oliveira Filho2019-06-036-121/+232
* iris: Pull brw_nir_analyze_ubo_ranges() call out setup_uniformsCaio Marcelo de Oliveira Filho2019-06-031-3/+10
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